[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-arm] [Qemu-devel] [PATCH v6 6/9] xlnx-zynqmp-pmu: Connect the
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH v6 6/9] xlnx-zynqmp-pmu: Connect the PMU interrupt controller |
Date: |
Thu, 18 Jan 2018 18:31:45 -0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 |
On 01/18/2018 03:38 PM, Alistair Francis wrote:
> Signed-off-by: Alistair Francis <address@hidden>
> Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
> ---
>
> hw/microblaze/xlnx-zynqmp-pmu.c | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
> index 145837b372..7312bfe23e 100644
> --- a/hw/microblaze/xlnx-zynqmp-pmu.c
> +++ b/hw/microblaze/xlnx-zynqmp-pmu.c
> @@ -24,6 +24,8 @@
> #include "cpu.h"
> #include "boot.h"
>
> +#include "hw/intc/xlnx-pmu-iomod-intc.h"
> +
> /* Define the PMU device */
>
> #define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc"
> @@ -34,14 +36,18 @@
> #define XLNX_ZYNQMP_PMU_ROM_ADDR 0xFFD00000
> #define XLNX_ZYNQMP_PMU_RAM_ADDR 0xFFDC0000
>
> +#define XLNX_ZYNQMP_PMU_INTC_ADDR 0xFFD40000
> +
> typedef struct XlnxZynqMPPMUSoCState {
> /*< private >*/
> DeviceState parent_obj;
>
> /*< public >*/
> MicroBlazeCPU cpu;
> + XlnxPMUIOIntc intc;
> } XlnxZynqMPPMUSoCState;
>
> +
> static void xlnx_zynqmp_pmu_soc_init(Object *obj)
> {
> XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj);
> @@ -50,6 +56,9 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj)
> TYPE_MICROBLAZE_CPU);
> object_property_add_child(obj, "pmu-cpu", OBJECT(&s->cpu),
> &error_abort);
> +
> + object_initialize(&s->intc, sizeof(s->intc), TYPE_XLNX_PMU_IO_INTC);
> + qdev_set_parent_bus(DEVICE(&s->intc), sysbus_get_default());
> }
>
> static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
> @@ -80,6 +89,21 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev,
> Error **errp)
> error_propagate(errp, err);
> return;
> }
> +
> + object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size",
> + &error_abort);
> + object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge",
> + &error_abort);
> + object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive",
> + &error_abort);
> + object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
> + if (err) {
> + error_propagate(errp, err);
> + return;
> + }
> + sysbus_mmio_map(SYS_BUS_DEVICE(&s->intc), 0, XLNX_ZYNQMP_PMU_INTC_ADDR);
> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->intc), 0,
> + qdev_get_gpio_in(DEVICE(&s->cpu), MB_CPU_IRQ));
> }
>
> static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data)
>
- [Qemu-arm] [PATCH v6 0/9] Add the ZynqMP PMU and IPI, Alistair Francis, 2018/01/18
- [Qemu-arm] [PATCH v6 1/9] microblaze: boot.c: Don't try to find NULL pointer, Alistair Francis, 2018/01/18
- [Qemu-arm] [PATCH v6 2/9] xlnx-zynqmp-pmu: Initial commit of the ZynqMP PMU, Alistair Francis, 2018/01/18
- [Qemu-arm] [PATCH v6 4/9] aarch64-softmmu.mak: Use an ARM specific config, Alistair Francis, 2018/01/18
- [Qemu-arm] [PATCH v6 3/9] xlnx-zynqmp-pmu: Add the CPU and memory, Alistair Francis, 2018/01/18
- [Qemu-arm] [PATCH v6 6/9] xlnx-zynqmp-pmu: Connect the PMU interrupt controller, Alistair Francis, 2018/01/18
- Re: [Qemu-arm] [Qemu-devel] [PATCH v6 6/9] xlnx-zynqmp-pmu: Connect the PMU interrupt controller,
Philippe Mathieu-Daudé <=
- [Qemu-arm] [PATCH v6 5/9] xlnx-pmu-iomod-intc: Add the PMU Interrupt controller, Alistair Francis, 2018/01/18
- [Qemu-arm] [PATCH v6 8/9] xlnx-zynqmp-pmu: Connect the IPI device to the PMU, Alistair Francis, 2018/01/18
[Qemu-arm] [PATCH v6 7/9] xlnx-zynqmp-ipi: Initial version of the Xilinx IPI device, Alistair Francis, 2018/01/18
[Qemu-arm] [PATCH v6 9/9] xlnx-zynqmp: Connect the IPI device to the ZynqMP SoC, Alistair Francis, 2018/01/18