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Re: [Qemu-arm] [PATCH 4/4] hw/intc/arm_gic: Fix the NS view of C_BPR whe
From: |
Luc Michel |
Subject: |
Re: [Qemu-arm] [PATCH 4/4] hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1 |
Date: |
Mon, 22 Jan 2018 16:25:00 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 |
On 01/22/2018 04:19 PM, Peter Maydell wrote:
> On 19 January 2018 at 14:57, <address@hidden> wrote:
>> From: Luc MICHEL <address@hidden>
>>
>> When C_CTRL.CBPR is 1, the Non-Secure view of C_BPR is altered:
>> - A Non-Secure read of C_BPR should return the BPR value plus 1,
>> saturated to 7,
>> - A Non-Secure write should be ignored.
>>
>> Signed-off-by: Luc MICHEL <address@hidden>
>> ---
>> hw/intc/arm_gic.c | 16 +++++++++++++---
>> 1 file changed, 13 insertions(+), 3 deletions(-)
>>
>> diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
>> index d0a41a89ae..7418b7a082 100644
>> --- a/hw/intc/arm_gic.c
>> +++ b/hw/intc/arm_gic.c
>> @@ -1211,8 +1211,13 @@ static MemTxResult gic_cpu_read(GICState *s, int cpu,
>> int offset,
>> break;
>> case 0x08: /* Binary Point */
>> if (s->security_extn && !attrs.secure) {
>> - /* BPR is banked. Non-secure copy stored in ABPR. */
>> - *data = s->abpr[cpu];
>> + if (s->cpu_ctlr[cpu] & GICC_CTLR_CBPR) {
>> + /* NS view of BPR when CBPR is 1 */
>> + *data = MIN(s->bpr[cpu] + 1, 7);
>> + } else {
>> + /* BPR is banked. Non-secure copy stored in ABPR. */
>> + *data = s->abpr[cpu];
>> + }
>> } else {
>> *data = s->bpr[cpu];
>> }
>> @@ -1285,7 +1290,12 @@ static MemTxResult gic_cpu_write(GICState *s, int
>> cpu, int offset,
>> break;
>> case 0x08: /* Binary Point */
>> if (s->security_extn && !attrs.secure) {
>> - s->abpr[cpu] = MAX(value & 0x7, GIC_MIN_ABPR);
>> + if (s->cpu_ctlr[cpu] & GICC_CTLR_CBPR) {
>> + /* WI when CTLR is 1 */
>
> should be "CBPR", yes?
Oops yes, sorry.
>
>> + return MEMTX_OK;
>> + } else {
>> + s->abpr[cpu] = MAX(value & 0x7, GIC_MIN_ABPR);
>> + }
>> } else {
>> s->bpr[cpu] = MAX(value & 0x7, GIC_MIN_BPR);
>> }
>> --
>
> thanks
> -- PMM
>
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- [Qemu-arm] [PATCH 0/4] arm_gic: Various fixes, luc . michel, 2018/01/19
- [Qemu-arm] [PATCH 4/4] hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1, luc . michel, 2018/01/19
- [Qemu-arm] [PATCH 1/4] hw/intc/arm_gic: Prevent the GIC from signaling an IRQ when it's "active and pending", luc . michel, 2018/01/19
- [Qemu-arm] [PATCH 2/4] hw/intc/arm_gic: Fix C_RPR value on idle priority, luc . michel, 2018/01/19
- [Qemu-arm] [PATCH 3/4] hw/intc/arm_gic: Fix group priority computation for group 1 IRQs, luc . michel, 2018/01/19
- Re: [Qemu-arm] [PATCH 0/4] arm_gic: Various fixes, Peter Maydell, 2018/01/22