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Re: [Qemu-arm] [Qemu-devel] [PATCH v2 17/32] arm/translate-a64: initial
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH v2 17/32] arm/translate-a64: initial decode for simd_two_reg_misc_fp16 |
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Date: |
Thu, 8 Feb 2018 14:15:16 -0800 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 |
On 02/08/2018 09:31 AM, Alex Bennée wrote:
> @@ -11472,6 +11512,8 @@ static void disas_data_proc_simd(DisasContext *s,
> uint32_t insn)
> if (fn) {
> fn(s, insn);
> } else {
> + /* fprintf(stderr, "%s: failed to find %#4x @ %#" PRIx64 "\n", */
> + /* __func__, insn, s->pc); */
> unallocated_encoding(s);
Prolly wanna drop this. ;-) Otherwise,
Reviewed-by: Richard Henderson <address@hidden>
r~
- Re: [Qemu-arm] [Qemu-devel] [PATCH v2 20/32] arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16, (continued)
[Qemu-arm] [PATCH v2 26/32] arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 31/32] arm/translate-a64: implement simd_scalar_three_reg_same_fp16, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 19/32] arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 17/32] arm/translate-a64: initial decode for simd_two_reg_misc_fp16, Alex Bennée, 2018/02/08
- Re: [Qemu-arm] [Qemu-devel] [PATCH v2 17/32] arm/translate-a64: initial decode for simd_two_reg_misc_fp16,
Richard Henderson <=
[Qemu-arm] [PATCH v2 21/32] arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 18/32] arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 32/32] arm/translate-a64: add all single op FP16 to handle_fp_1src_half, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 22/32] arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16, Alex Bennée, 2018/02/08
[Qemu-arm] [PATCH v2 27/32] arm/helper.c: re-factor rsqrte and add rsqrte_f16, Alex Bennée, 2018/02/08