[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-arm] [PATCH v2 32/67] target/arm: Implement SVE copy to vector
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [PATCH v2 32/67] target/arm: Implement SVE copy to vector (predicated) |
Date: |
Fri, 23 Feb 2018 15:45:29 +0000 |
On 17 February 2018 at 18:22, Richard Henderson
<address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target/arm/translate-sve.c | 13 +++++++++++++
> target/arm/sve.decode | 6 ++++++
> 2 files changed, 19 insertions(+)
>
> diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
> index 207a22a0bc..fc2a295ab7 100644
> --- a/target/arm/translate-sve.c
> +++ b/target/arm/translate-sve.c
> @@ -2422,6 +2422,19 @@ static void trans_LASTB_r(DisasContext *s, arg_rpr_esz
> *a, uint32_t insn)
> do_last_general(s, a, true);
> }
>
> +static void trans_CPY_m_r(DisasContext *s, arg_rpr_esz *a, uint32_t insn)
> +{
> + do_cpy_m(s, a->esz, a->rd, a->rd, a->pg, cpu_reg_sp(s, a->rn));
> +}
> +
> +static void trans_CPY_m_v(DisasContext *s, arg_rpr_esz *a, uint32_t insn)
> +{
> + int ofs = vec_reg_offset(s, a->rn, 0, a->esz);
> + TCGv_i64 t = load_esz(cpu_env, ofs, a->esz);
> + do_cpy_m(s, a->esz, a->rd, a->rd, a->pg, t);
> + tcg_temp_free_i64(t);
> +}
> +
> /*
> *** SVE Memory - 32-bit Gather and Unsized Contiguous Group
> */
> diff --git a/target/arm/sve.decode b/target/arm/sve.decode
> index 1370802c12..5e127de88c 100644
> --- a/target/arm/sve.decode
> +++ b/target/arm/sve.decode
> @@ -451,6 +451,12 @@ LASTB_v 00000101 .. 10001 1 100 ... .....
> ..... @rd_pg_rn
> LASTA_r 00000101 .. 10000 0 101 ... ..... .....
> @rd_pg_rn
> LASTB_r 00000101 .. 10000 1 101 ... ..... .....
> @rd_pg_rn
>
> +# SVE copy element from SIMD&FP scalar register
> +CPY_m_v 00000101 .. 100000 100 ... ..... .....
> @rd_pg_rn
> +
> +# SVE copy element from general register to vector (predicated)
> +CPY_m_r 00000101 .. 101000 101 ... ..... .....
> @rd_pg_rn
> +
> ### SVE Predicate Logical Operations Group
>
> # SVE predicate logical operations
> --
> 2.14.3
Reviewed-by: Peter Maydell <address@hidden>
(if only every patch in the series was this size...)
thanks
-- PMM
- Re: [Qemu-arm] [Qemu-devel] [PATCH v2 28/67] target/arm: Implement SVE Permute - Predicates Group, (continued)
- [Qemu-arm] [PATCH v2 27/67] target/arm: Implement SVE Permute - Unpredicated Group, Richard Henderson, 2018/02/17
- [Qemu-arm] [PATCH v2 30/67] target/arm: Implement SVE compress active elements, Richard Henderson, 2018/02/17
- [Qemu-arm] [PATCH v2 29/67] target/arm: Implement SVE Permute - Interleaving Group, Richard Henderson, 2018/02/17
- [Qemu-arm] [PATCH v2 32/67] target/arm: Implement SVE copy to vector (predicated), Richard Henderson, 2018/02/17
- Re: [Qemu-arm] [PATCH v2 32/67] target/arm: Implement SVE copy to vector (predicated),
Peter Maydell <=
- [Qemu-arm] [PATCH v2 31/67] target/arm: Implement SVE conditionally broadcast/extract element, Richard Henderson, 2018/02/17
- [Qemu-arm] [PATCH v2 33/67] target/arm: Implement SVE reverse within elements, Richard Henderson, 2018/02/17
- [Qemu-arm] [PATCH v2 35/67] target/arm: Implement SVE Select Vectors Group, Richard Henderson, 2018/02/17
- [Qemu-arm] [PATCH v2 34/67] target/arm: Implement SVE vector splice (predicated), Richard Henderson, 2018/02/17