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Re: [Qemu-arm] [PATCH v3 13/31] arm/translate-a64: add FP16 pairwise ops
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-arm] [PATCH v3 13/31] arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16 |
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Date: |
Fri, 23 Feb 2018 15:59:38 -0800 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 |
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> This includes FMAXNMP, FADDP, FMAXP, FMINNMP, FMINP.
>
> Signed-off-by: Alex Bennée <address@hidden>
>
> ---
> v2
> - checkpatch fixes
> ---
> target/arm/translate-a64.c | 208
> +++++++++++++++++++++++++++++----------------
> 1 file changed, 133 insertions(+), 75 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~
- Re: [Qemu-arm] [PATCH v3 03/31] target/arm/cpu.h: update comment for half-precision values, (continued)
- [Qemu-arm] [PATCH v3 01/31] include/exec/helper-head.h: support f16 in helper calls, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 04/31] target/arm/cpu.h: add additional float_status flags, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 05/31] target/arm/helper: pass explicit fpst to set_rmode, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 06/31] arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV), Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 07/31] arm/translate-a64: handle_3same_64 comment fix, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 08/31] arm/translate-a64: initial decode for simd_three_reg_same_fp16, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 10/31] arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 13/31] arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16, Alex Bennée, 2018/02/23
- Re: [Qemu-arm] [PATCH v3 13/31] arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16,
Richard Henderson <=
- [Qemu-arm] [PATCH v3 09/31] arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 18/31] arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 30/31] arm/translate-a64: implement simd_scalar_three_reg_same_fp16, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 16/31] arm/translate-a64: initial decode for simd_two_reg_misc_fp16, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 17/31] arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 21/31] arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16, Alex Bennée, 2018/02/23
- [Qemu-arm] [PATCH v3 20/31] arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16, Alex Bennée, 2018/02/23