Re: [Qemu-arm] [PATCH v2 51/67] target/arm: Implement SVE load and broadcast element

[Peter Maydell]

On 17 February 2018 at 18:23, Richard Henderson
<address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
>  target/arm/helper-sve.h    |  5 +++++
>  target/arm/sve_helper.c    | 43 ++++++++++++++++++++++++++++++++++++
>  target/arm/translate-sve.c | 55 
> +++++++++++++++++++++++++++++++++++++++++++++-
>  target/arm/sve.decode      |  5 +++++
>  4 files changed, 107 insertions(+), 1 deletion(-)
>

>
> +/* Load and broadcast element.  */
> +static void trans_LD1R_zpri(DisasContext *s, arg_rpri_load *a, uint32_t insn)
> +{
> +    unsigned vsz = vec_full_reg_size(s);
> +    unsigned psz = pred_full_reg_size(s);
> +    unsigned esz = dtype_esz[a->dtype];
> +    TCGLabel *over = gen_new_label();
> +    TCGv_i64 temp;
> +
> +    /* If the guarding predicate has no bits set, no load occurs.  */
> +    if (psz <= 8) {
> +        temp = tcg_temp_new_i64();
> +        tcg_gen_ld_i64(temp, cpu_env, pred_full_reg_offset(s, a->pg));
> +        tcg_gen_andi_i64(temp, temp,
> +                         deposit64(0, 0, psz * 8, pred_esz_masks[esz]));
> +        tcg_gen_brcondi_i64(TCG_COND_EQ, temp, 0, over);
> +        tcg_temp_free_i64(temp);
> +    } else {
> +        TCGv_i32 t32 = tcg_temp_new_i32();
> +        find_last_active(s, t32, esz, a->pg);
> +        tcg_gen_brcondi_i32(TCG_COND_LT, t32, 0, over);
> +        tcg_temp_free_i32(t32);
> +    }
> +
> +    /* Load the data.  */
> +    temp = tcg_temp_new_i64();
> +    tcg_gen_addi_i64(temp, cpu_reg_sp(s, a->rn), a->imm);

Isn't the immediate offset supposed to be scaled by mbytes ?

> +    tcg_gen_qemu_ld_i64(temp, temp, get_mem_index(s),
> +                        s->be_data | dtype_mop[a->dtype]);
> +
> +    /* Broadcast to *all* elements.  */
> +    tcg_gen_gvec_dup_i64(esz, vec_full_reg_offset(s, a->rd),
> +                         vsz, vsz, temp);
> +    tcg_temp_free_i64(temp);
> +
> +    /* Zero the inactive elements.  */
> +    gen_set_label(over);
> +    do_clr_inactive_zp(s, a->rd, a->pg, esz);
> +}
> +

Otherwise
Reviewed-by: Peter Maydell <address@hidden>

thanks
-- PMM