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[Qemu-arm] [RISU 0/3] ARM additions for v8.1-simd and v8.3-compnum
From: |
Richard Henderson |
Subject: |
[Qemu-arm] [RISU 0/3] ARM additions for v8.1-simd and v8.3-compnum |
Date: |
Wed, 28 Feb 2018 08:48:12 -0800 |
I've rebased these onto master. There don't seem to be any
consistent examples of how extensions are to be named in this
new group-enabled world, but it's my opinion that the bike
shed should be green.
Since fp16 support is not yet present on the AArch32 side,
I have disabled generation of those instructions here.
r~
Richard Henderson (3):
Add aa64 sqrdml[as]h
Add aa64 fcadd + fcmla
Add arm and thumb vqrdml[as]h, vcadd, vcmla
aarch64.risu | 37 +++++++++++++++++++++++++++++++++++++
arm.risu | 25 +++++++++++++++++++++++++
thumb.risu | 25 +++++++++++++++++++++++++
3 files changed, 87 insertions(+)
--
2.14.3
- [Qemu-arm] [RISU 0/3] ARM additions for v8.1-simd and v8.3-compnum,
Richard Henderson <=
- [Qemu-arm] [RISU 2/3] Add aa64 fcadd + fcmla, Richard Henderson, 2018/02/28
- [Qemu-arm] [RISU 1/3] Add aa64 sqrdml[as]h, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH] decodetree: Propagate return value from translate subroutines, Richard Henderson, 2018/02/28
- [Qemu-arm] [RISU 3/3] Add arm and thumb vqrdml[as]h, vcadd, vcmla, Richard Henderson, 2018/02/28