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[Qemu-arm] [PATCH v3 06/16] target/arm: Decode aa64 armv8.1 scalar/vecto
From: |
Richard Henderson |
Subject: |
[Qemu-arm] [PATCH v3 06/16] target/arm: Decode aa64 armv8.1 scalar/vector x indexed element |
Date: |
Wed, 28 Feb 2018 11:31:15 -0800 |
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate-a64.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index ae16313eb0..e4d2d548ba 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11987,6 +11987,13 @@ static void disas_simd_indexed(DisasContext *s,
uint32_t insn)
case 0x19: /* FMULX */
is_fp = true;
break;
+ case 0x1d: /* SQRDMLAH */
+ case 0x1f: /* SQRDMLSH */
+ if (!arm_dc_feature(s, ARM_FEATURE_V8_RDM)) {
+ unallocated_encoding(s);
+ return;
+ }
+ break;
default:
unallocated_encoding(s);
return;
@@ -12230,6 +12237,28 @@ static void disas_simd_indexed(DisasContext *s,
uint32_t insn)
tcg_op, tcg_idx);
}
break;
+ case 0x1d: /* SQRDMLAH */
+ read_vec_element_i32(s, tcg_res, rd, pass,
+ is_scalar ? size : MO_32);
+ if (size == 1) {
+ gen_helper_neon_qrdmlah_s16(tcg_res, cpu_env,
+ tcg_op, tcg_idx, tcg_res);
+ } else {
+ gen_helper_neon_qrdmlah_s32(tcg_res, cpu_env,
+ tcg_op, tcg_idx, tcg_res);
+ }
+ break;
+ case 0x1f: /* SQRDMLSH */
+ read_vec_element_i32(s, tcg_res, rd, pass,
+ is_scalar ? size : MO_32);
+ if (size == 1) {
+ gen_helper_neon_qrdmlsh_s16(tcg_res, cpu_env,
+ tcg_op, tcg_idx, tcg_res);
+ } else {
+ gen_helper_neon_qrdmlsh_s32(tcg_res, cpu_env,
+ tcg_op, tcg_idx, tcg_res);
+ }
+ break;
default:
g_assert_not_reached();
}
--
2.14.3
- [Qemu-arm] [PATCH v3 00/16] ARM v8.1 simd + v8.3 complex insns, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 02/16] target/arm: Refactor disas_simd_indexed decode, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 03/16] target/arm: Refactor disas_simd_indexed size checks, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 01/16] target/arm: Add ARM_FEATURE_V8_RDM, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 04/16] target/arm: Decode aa64 armv8.1 scalar three same extra, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 05/16] target/arm: Decode aa64 armv8.1 three same extra, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 06/16] target/arm: Decode aa64 armv8.1 scalar/vector x indexed element,
Richard Henderson <=
- [Qemu-arm] [PATCH v3 08/16] target/arm: Decode aa32 armv8.1 two reg and a scalar, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 09/16] target/arm: Enable ARM_FEATURE_V8_RDM, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 07/16] target/arm: Decode aa32 armv8.1 three same, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 10/16] target/arm: Add ARM_FEATURE_V8_FCMA, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 11/16] target/arm: Decode aa64 armv8.3 fcadd, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 12/16] target/arm: Decode aa64 armv8.3 fcmla, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 14/16] target/arm: Decode aa32 armv8.3 2-reg-index, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 13/16] target/arm: Decode aa32 armv8.3 3-same, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 15/16] target/arm: Decode t32 simd 3reg and 2reg_scalar extension, Richard Henderson, 2018/02/28
- [Qemu-arm] [PATCH v3 16/16] target/arm: Enable ARM_FEATURE_V8_FCMA, Richard Henderson, 2018/02/28