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Re: [Qemu-arm] [Qemu-devel] [PATCH 17/19] hw/misc/iotkit-secctl: Add rem
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH 17/19] hw/misc/iotkit-secctl: Add remaining simple registers |
Date: |
Thu, 1 Mar 2018 12:47:26 +0000 |
On 27 February 2018 at 22:00, Richard Henderson
<address@hidden> wrote:
> On 02/20/2018 10:03 AM, Peter Maydell wrote:
>> + case A_BRGINTEN:
>> + s->brginten = value & 0xffff;
>> + break;
>
> Looks to me like bits 0-15 are read-only 0x0000,
> so, that 0xffff should be 0xffff0000.
Oops, yes, misread that. The relevant bits are [31:16], not [15:0],
for all the BRG registers. This is the only place where it makes a
difference to us, though.
thanks
-- PMM
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Peter Maydell <=