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Re: [Qemu-arm] [PATCH v2] target-arm: Check undefined opcodes for SWP in
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [PATCH v2] target-arm: Check undefined opcodes for SWP in A32 decoder |
Date: |
Thu, 5 Apr 2018 13:26:22 +0100 |
On 23 March 2018 at 21:43, Onur Sahin <address@hidden> wrote:
> Thanks for the feedback Peter. Removing the redundant check on bit
> 23 and adding checks for the "should be" bits as well (bits [11:8]).
>
> The following patch should make sure we are not treating
> architecturally Undefined instructions as a SWP, by verifying
> the opcodes as per section A8.8.229 of ARMv7-A specification.
>
> Best,
> Onur
>
> Signed-off-by: Onur Sahin <address@hidden>
> ---
Thanks; I've applied this patch to target-arm.next for 2.12,
with some minor tweaks to the commit message.
-- PMM
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