Re: [Qemu-arm] [Qemu-devel] [PATCH 2/2] target/arm: Gate "miscellaneous FP" insns by ID register field

[Richard Henderson]

On 2/22/19 9:36 AM, Peter Maydell wrote:
> On Fri, 22 Feb 2019 at 17:09, Peter Maydell <address@hidden> wrote:
>>
>> There is a set of VFP instructions which we implement in
>> disas_vfp_v8_insn() and gate on the ARM_FEATURE_V8 bit.
>> These were all first introduced in v8 for A-profile, but in
>> M-profile they appeared in v7M. Gate them on the MVFR2
>> FPMisc field instead, and rename the function appropriately.
> 
>> diff --git a/target/arm/translate.c b/target/arm/translate.c
>> index b7702fb49f7..af8f9e669b8 100644
>> --- a/target/arm/translate.c
>> +++ b/target/arm/translate.c
>> @@ -3357,7 +3357,7 @@ static const uint8_t fp_decode_rm[] = {
>>      FPROUNDING_NEGINF,
>>  };
>>
>> -static int disas_vfp_v8_insn(DisasContext *s, uint32_t insn)
>> +static int disas_vfp_misc_insn(DisasContext *s, uint32_t insn)
>>  {
>>      uint32_t rd, rn, rm, dp = extract32(insn, 8, 1);
>>
> 
> Oops, I forgot to commit this part of the change:
> 
> @@ -3361,10 +3361,6 @@ static int disas_vfp_misc_insn(DisasContext *s,
> uint32_t insn)
>  {
>      uint32_t rd, rn, rm, dp = extract32(insn, 8, 1);
> 
> -    if (!arm_dc_feature(s, ARM_FEATURE_V8)) {
> -        return 1;
> -    }
> -
>      if (dp) {
>          VFP_DREG_D(rd, insn);
>          VFP_DREG_N(rn, insn);

With the addition,
Reviewed-by: Richard Henderson <address@hidden>


r~