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Re: [Qemu-arm] [PATCH] hw/arm/stellaris: Implement watchdog timer
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [PATCH] hw/arm/stellaris: Implement watchdog timer |
Date: |
Tue, 26 Feb 2019 17:54:49 +0000 |
On Fri, 22 Feb 2019 at 23:45, <address@hidden> wrote:
>
> From: Michel Heily <address@hidden>
>
> Signed-off-by: Michel Heily <address@hidden>
Hi; thanks for this patch; it looks pretty good (though
it does have a few issues). However, it turns out that we
already have a model of something that's practically the
same hardware...
I would suggest that you look at the code we have for
the CMSDK APB watchdog in hw/watchdog/cmsdk-apb-watchdog.c:
I think the semantics of that device are almost identical
to this one, so rather than writing an entire new device
model we can just parameterize that one to behave as the
Stellaris SoC requires. I think the differences are just:
* ID register values are different
* the control register doesn't allow the RESEN or INTEN bits
to be written from 1 to 0, only 0 to 1
* the WDOGITCR register doesn't exist
* new WDTTEST register at 0x418
So we can just implement the Stellaris watchdog device
as a subclass of the CMSDK APB watchdog -- you can look
at hw/char/pl011.c as an example of how to do this
(in that case we're modifying the standard Arm PL011
UART to make it look like the one in the Stellaris board) --
and then make the CMSDK watchdog's code conditionally
do the Stellaris-specific things in that case.
thanks
-- PMM