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Re: [Qemu-arm] [PATCH 2/3] target/arm: cortex-a7 and cortex-a15 have pmu
From: |
Andrew Jones |
Subject: |
Re: [Qemu-arm] [PATCH 2/3] target/arm: cortex-a7 and cortex-a15 have pmus |
Date: |
Tue, 26 Mar 2019 18:49:17 +0100 |
User-agent: |
NeoMutt/20180716 |
On Tue, Mar 26, 2019 at 05:38:36PM +0000, Aaron Lindsay OS wrote:
> On Mar 22 17:23, Andrew Jones wrote:
> > cortex-a7 and cortex-a15 have pmus (PMUv2) and they advertise
> > them in ID_DFR0. Let's allow them to function. This also enables
> > the pmu cpu property to work with these cpu types, i.e. we can
> > now do '-cpu cortex-a15,pmu=off' to remove the pmu.
>
> I'm a little nervous about this one, but PMUv2 isn't fresh enough in my
> mind to have a good reason other than that I didn't consider it when
> writing my recent PMU patches. Do you know if this boots a kernel that
> can detect and use the PMU successfully while thinking it's PMUv2?
>
I didn't try booting a kernel and running perf or anything like that.
It does now run the pmu kvm-unit-tests test though. As this patch is
now in master the test you propose can be done with a latest build :)
Thanks,
drew
- [Qemu-arm] [PATCH 0/3] target/arm: pmu fixes, Andrew Jones, 2019/03/22
- [Qemu-arm] [PATCH 1/3] target/arm: fix crash on pmu register access, Andrew Jones, 2019/03/22
- [Qemu-arm] [PATCH 3/3] target/arm: make pmccntr_op_start/finish static, Andrew Jones, 2019/03/22
- [Qemu-arm] [PATCH 2/3] target/arm: cortex-a7 and cortex-a15 have pmus, Andrew Jones, 2019/03/22
- Re: [Qemu-arm] [PATCH 0/3] target/arm: pmu fixes, Andrew Jones, 2019/03/22
- Re: [Qemu-arm] [Qemu-devel] [PATCH 0/3] target/arm: pmu fixes, Richard Henderson, 2019/03/23
- Re: [Qemu-arm] [PATCH 0/3] target/arm: pmu fixes, Peter Maydell, 2019/03/25