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[Qemu-arm] [PATCH] hw/arm/smmuv3: Fix decoding of ID register range
From: |
Peter Maydell |
Subject: |
[Qemu-arm] [PATCH] hw/arm/smmuv3: Fix decoding of ID register range |
Date: |
Fri, 24 May 2019 13:48:29 +0100 |
The SMMUv3 ID registers cover an area 0x30 bytes in size
(12 registers, 4 bytes each). We were incorrectly decoding
only the first 0x20 bytes.
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/smmuv3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index fd8ec7860ee..e96d5beb9a8 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -1232,7 +1232,7 @@ static MemTxResult smmu_readl(SMMUv3State *s, hwaddr
offset,
uint64_t *data, MemTxAttrs attrs)
{
switch (offset) {
- case A_IDREGS ... A_IDREGS + 0x1f:
+ case A_IDREGS ... A_IDREGS + 0x2f:
*data = smmuv3_idreg(offset - A_IDREGS);
return MEMTX_OK;
case A_IDR0 ... A_IDR5:
--
2.20.1
- [Qemu-arm] [PATCH] hw/arm/smmuv3: Fix decoding of ID register range,
Peter Maydell <=