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Re: [Qemu-arm] [RISU PATCH] arm.risu: Avoid VTRN with Vd == Vm
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [RISU PATCH] arm.risu: Avoid VTRN with Vd == Vm |
Date: |
Mon, 17 Jun 2019 15:24:10 +0100 |
On Thu, 13 Jun 2019 at 22:17, Richard Henderson
<address@hidden> wrote:
>
> On 6/13/19 7:37 AM, Peter Maydell wrote:
> > The AArch32 VTRN instruction is specified to give an UNKNOWN
> > result if Vd and Vm are the same register; avoid generating
> > this in risu output, as we already do for VUZP and VZIP.
> >
> > Signed-off-by: Peter Maydell <address@hidden>
> > ---
> > Alex: this pattern error is why we don't pass your
> > testcases/aarch32-all/insn_VTRN__INC.risu.bin when compared
> > with a real Cortex-A7. You probably want to update that.
> >
> > arm.risu | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
>
> Reviewed-by: Richard Henderson <address@hidden>
Applied to risu master, thanks.
-- PMM