[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-arm] [PATCH v3 58/69] target/arm: Convert T16, Reverse bytes
From: |
Richard Henderson |
Subject: |
[Qemu-arm] [PATCH v3 58/69] target/arm: Convert T16, Reverse bytes |
Date: |
Wed, 28 Aug 2019 12:04:45 -0700 |
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 18 +++---------------
target/arm/t16.decode | 9 +++++++++
2 files changed, 12 insertions(+), 15 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 1dacae1a5b..ec5b095bd1 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10707,7 +10707,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t
insn)
static void disas_thumb_insn(DisasContext *s, uint32_t insn)
{
- uint32_t val, op, rm, rn, rd, shift, cond;
+ uint32_t val, op, rm, rd, shift, cond;
int32_t offset;
int i;
TCGv_i32 tmp;
@@ -10904,20 +10904,8 @@ static void disas_thumb_insn(DisasContext *s, uint32_t
insn)
break;
}
- /* Otherwise this is rev */
- ARCH(6);
- rn = (insn >> 3) & 0x7;
- rd = insn & 0x7;
- tmp = load_reg(s, rn);
- switch (op1) {
- case 0: tcg_gen_bswap32_i32(tmp, tmp); break;
- case 1: gen_rev16(tmp, tmp); break;
- case 3: gen_revsh(tmp, tmp); break;
- default:
- g_assert_not_reached();
- }
- store_reg(s, rd, tmp);
- break;
+ /* Otherwise this is rev, in decodetree */
+ goto illegal_op;
}
case 6: /* setend, cps; in decodetree */
diff --git a/target/arm/t16.decode b/target/arm/t16.decode
index 032902a1f4..19a442b894 100644
--- a/target/arm/t16.decode
+++ b/target/arm/t16.decode
@@ -24,6 +24,7 @@
&s_rri_rot !extern s rn rd imm rot
&s_rrrr !extern s rd rn rm ra
&rrr_rot !extern rd rn rm rot
+&rr !extern rd rm
&ri !extern rd imm
&r !extern rm
&ldst_rr !extern p w u rn rt rm shimm shtype
@@ -195,3 +196,11 @@ SETEND 1011 0110 010 1 E:1 000 &setend
CPS 1011 0110 011 . 0 A:1 I:1 F:1 &cps mode=0 M=0 %imod
CPS_v7m 1011 0110 011 im:1 00 I:1 F:1
}
+
+# Reverse bytes
+
+@rdm .... .... .. rm:3 rd:3 &rr
+
+REV 1011 1010 00 ... ... @rdm
+REV16 1011 1010 01 ... ... @rdm
+REVSH 1011 1010 11 ... ... @rdm
--
2.17.1
- [Qemu-arm] [PATCH v3 26/69] target/arm: Convert Signed multiply, signed and unsigned divide, (continued)
- [Qemu-arm] [PATCH v3 26/69] target/arm: Convert Signed multiply, signed and unsigned divide, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 28/69] target/arm: Convert LDM, STM, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 34/69] target/arm: Convert RFE and SRS, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 33/69] target/arm: Convert SVC, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 40/69] target/arm: Convert Table Branch, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 37/69] target/arm: Convert SETEND, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 51/69] target/arm: Convert T16 add/sub (3 low, 2 low and imm), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 54/69] target/arm: Convert T16 add, compare, move (two high registers), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 56/69] target/arm: Convert T16, extract, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 58/69] target/arm: Convert T16, Reverse bytes,
Richard Henderson <=
- [Qemu-arm] [PATCH v3 49/69] target/arm: Convert T16 add pc/sp (immediate), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 36/69] target/arm: Convert CPS (privileged), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 41/69] target/arm: Convert SG, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 47/69] target/arm: Convert T16 load/store (register offset), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 52/69] target/arm: Convert T16 one low register and immediate, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 35/69] target/arm: Convert Clear-Exclusive, Barriers, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 39/69] target/arm: Convert Unallocated memory hint, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 43/69] target/arm: Simplify disas_thumb2_insn, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 44/69] target/arm: Simplify disas_arm_insn, Richard Henderson, 2019/08/28