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[PATCH v2 4/5] target/arm/cpu: Update coding style to make checkpatch.pl
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v2 4/5] target/arm/cpu: Update coding style to make checkpatch.pl happy |
Date: |
Thu, 23 Apr 2020 09:33:57 +0200 |
We will move this code in the next commit. Clean it up
first to avoid checkpatch.pl errors.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
target/arm/cpu.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 30e961f775..a1e38b38ba 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -582,7 +582,8 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int
interrupt_request)
CPUARMState *env = &cpu->env;
bool ret = false;
- /* ARMv7-M interrupt masking works differently than -A or -R.
+ /*
+ * ARMv7-M interrupt masking works differently than -A or -R.
* There is no FIQ/IRQ distinction. Instead of I and F bits
* masking FIQ and IRQ interrupts, an exception is taken only
* if it is higher priority than the current execution priority
@@ -1912,7 +1913,8 @@ static void arm1026_initfn(Object *obj)
static void arm1136_r2_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
- /* What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
+ /*
+ * What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
* older core than plain "arm1136". In particular this does not
* have the v6K features.
* These ID register values are correct for 1136 but may be wrong
@@ -2698,7 +2700,8 @@ static const ARMCPUInfo arm_cpus[] = {
{ .name = "arm926", .initfn = arm926_initfn },
{ .name = "arm946", .initfn = arm946_initfn },
{ .name = "arm1026", .initfn = arm1026_initfn },
- /* What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
+ /*
+ * What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
* older core than plain "arm1136". In particular this does not
* have the v6K features.
*/
--
2.21.1
- [PATCH v2 0/5] target/arm: Restrict TCG cpus to TCG accel, Philippe Mathieu-Daudé, 2020/04/23
- [PATCH v2 1/5] target/arm: Restric the Address Translate write operation to TCG accel, Philippe Mathieu-Daudé, 2020/04/23
- [PATCH v2 2/5] target/arm: Make cpu_register() available for other files, Philippe Mathieu-Daudé, 2020/04/23
- [PATCH v2 3/5] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[], Philippe Mathieu-Daudé, 2020/04/23
- [PATCH v2 4/5] target/arm/cpu: Update coding style to make checkpatch.pl happy,
Philippe Mathieu-Daudé <=
- [PATCH v2 5/5] target/arm: Restrict TCG cpus to TCG accel, Philippe Mathieu-Daudé, 2020/04/23
- Re: [PATCH v2 0/5] target/arm: Restrict TCG cpus to TCG accel, Peter Maydell, 2020/04/27