[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
RE: [PATCH v2 00/10] Cadence GEM Fixes
From: |
Sai Pavan Boddu |
Subject: |
RE: [PATCH v2 00/10] Cadence GEM Fixes |
Date: |
Mon, 4 May 2020 17:15:05 +0000 |
Hi Ramon,
> -----Original Message-----
> From: Ramon Fried <address@hidden>
> Sent: Monday, May 4, 2020 9:20 PM
> To: Sai Pavan Boddu <address@hidden>
> Cc: Edgar E. Iglesias <address@hidden>; Alistair Francis
> <address@hidden>; Peter Maydell <address@hidden>;
> Jason Wang <address@hidden>; Markus Armbruster
> <address@hidden>; Philippe Mathieu-Daudé <address@hidden>;
> Tong Ho <address@hidden>; open list:Xilinx Zynq <qemu-
> address@hidden>; QEMU Developers <address@hidden>
> Subject: Re: [PATCH v2 00/10] Cadence GEM Fixes
>
> On Mon, May 4, 2020 at 5:14 PM Sai Pavan Boddu
> <address@hidden> wrote:
> >
> > Hi,
> >
> > Following patch series fixes issues with priority queues, Adds JUMBO
> > Frame support, Makes Debug statements compilable & Fixes related to
> > multicast frames.
> >
> > Changes for V2:
> > Fixed build failure on fedora docker machine
> > Fix buggy debug print to use sized integer casting
> >
> > Sai Pavan Boddu (9):
> > net: cadence_gem: Fix debug statements
> > net: cadence_gem: Fix the queue address update during wrap around
> > net: cadence_gem: Fix irq update w.r.t queue
> > net: cadence_gem: Define access permission for interrupt registers
> > net: cadence_gem: Set ISR according to queue in use
> > net: cadence_gem: Add support for jumbo frames
> > net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 reg
> > net: cadence_gem: Update the reset value for interrupt mask register
> > net: cadence_gem: TX_LAST bit should be set by guest
> >
> > Tong Ho (1):
> > net: cadence_gem: Fix RX address filtering
> >
> > hw/net/cadence_gem.c | 167
> > +++++++++++++++++++++++++++++----------------------
> > 1 file changed, 94 insertions(+), 73 deletions(-)
> >
> > --
> > 2.7.4
> >
> Hey. did you test these with 64 descriptor addressing ?
[Sai Pavan Boddu] Tested it with a BareMetal application.
> I can test it for you if you need.
[Sai Pavan Boddu] Yes, would be nice, if you can review.
Thanks,
Sai Pavan
> Thanks,
> Ramon.
- Re: [PATCH v2 07/10] net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 reg, (continued)
- [PATCH v2 06/10] net: cadence_gem: Add support for jumbo frames, Sai Pavan Boddu, 2020/05/04
- [PATCH v2 08/10] net: cadence_gem: Update the reset value for interrupt mask register, Sai Pavan Boddu, 2020/05/04
- [PATCH v2 09/10] net: cadence_gem: TX_LAST bit should be set by guest, Sai Pavan Boddu, 2020/05/04
- [PATCH v2 10/10] net: cadence_gem: Fix RX address filtering, Sai Pavan Boddu, 2020/05/04
- Re: [PATCH v2 00/10] Cadence GEM Fixes, Ramon Fried, 2020/05/04
- RE: [PATCH v2 00/10] Cadence GEM Fixes,
Sai Pavan Boddu <=
- Re: [PATCH v2 00/10] Cadence GEM Fixes, no-reply, 2020/05/05