Re: [PATCH] arm/aspeed: Compute the number of CPUs from the SoC definition

[Cédric Le Goater]

On 5/20/20 8:27 AM, Markus Armbruster wrote:
> I figure this replaces my "[PATCH 05/24] aspeed: Don't create unwanted
> "cortex-a7-arm-cpu" devices".  Correct?
> 
> Let's mention it gets rid of unrealized CPUs then.  Let me try.
> 
> Cédric Le Goater <address@hidden> writes:
> 
>> Commit ece09beec457 ("aspeed: introduce a configurable number of CPU
>> per machine") was a convient change during bringup but the Aspeed SoCs
>> have a fixed number of CPUs : one for the AST2400 and AST2500, and two
>> for the AST2600.
> 
> Please add something like:
> 
>   When the configured number of CPUs is less than the SoC's fixed
>   number, the "unconfigured" CPUs are left unrealized.
> 
>> Remove the "num-cpu" property from the SoC state and use the fixed
>> number of CPUs defined in the SoC class instead. Compute the default,
>> min, max number of CPUs of the machine directly from the SoC class
>> definition.
> 
> Suggest to add:
> 
>   Visible in "info qom-tree"; here's the change for ast2600-evb:
> 
>      /machine (ast2600-evb-machine)
>        /peripheral (container)
>        /peripheral-anon (container)
>        /soc (ast2600-a1)
>          /a7mpcore (a15mpcore_priv)
>            /a15mp-priv-container[0] (qemu:memory-region)
>            /gic (arm_gic)
>              /gic_cpu[0] (qemu:memory-region)
>              /gic_cpu[1] (qemu:memory-region)
>     +        /gic_cpu[2] (qemu:memory-region)
>              /gic_dist[0] (qemu:memory-region)
>              /gic_vcpu[0] (qemu:memory-region)
>              /gic_viface[0] (qemu:memory-region)
>              /gic_viface[1] (qemu:memory-region)
>     +        /gic_viface[2] (qemu:memory-region)
>              /unnamed-gpio-in[0] (irq)
>              [...]
>     +        /unnamed-gpio-in[160] (irq)
>              [same for 161 to 190...]
>     +        /unnamed-gpio-in[191] (irq)
> 
>   Also visible in "info qtree"; here's the change for ast2600-evb:
> 
>      bus: main-system-bus
>        type System
>        dev: a15mpcore_priv, id ""
>          gpio-in "" 128
>     -    gpio-out "sysbus-irq" 5
>     -    num-cpu = 1 (0x1)
>     +    gpio-out "sysbus-irq" 10
>     +    num-cpu = 2 (0x2)
>          num-irq = 160 (0xa0)
>          mmio 0000000040460000/0000000000008000
>        dev: arm_gic, id ""
>     -    gpio-in "" 160
>     -    num-cpu = 1 (0x1)
>     +    gpio-in "" 192
>     +    num-cpu = 2 (0x2)
>          num-irq = 160 (0xa0)
>          revision = 2 (0x2)
>          has-security-extensions = true
>          has-virtualization-extensions = true
>          num-priority-bits = 8 (0x8)
>          mmio ffffffffffffffff/0000000000001000
>          mmio ffffffffffffffff/0000000000002000
>          mmio ffffffffffffffff/0000000000001000
>          mmio ffffffffffffffff/0000000000002000
>          mmio ffffffffffffffff/0000000000000100
>     +    mmio ffffffffffffffff/0000000000000100
>     +    mmio ffffffffffffffff/0000000000000200
>          mmio ffffffffffffffff/0000000000000200
> 
>> Signed-off-by: Cédric Le Goater <address@hidden>
> 
> Patch looks good.
> 
> Preferably with an improved commit message:
> Reviewed-by: Markus Armbruster <address@hidden>
> 
> I'd like to pick your patch into v2 of my "Fixes around device
> realization".  May I amend your commit message as shown above?

Sure.

Thanks,

C.