Re: [PATCH v1 1/2] target/microblaze: Use CPU properties to conditionalize bus exceptions

[Alistair Francis]

On Fri, Aug 28, 2020 at 4:41 AM Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
>
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Use CPU properties, instead of PVR fields, to conditionalize
> bus exceptions.
>
> Fixes: 2867a96ffb ("target/microblaze: Add props enabling exceptions on 
> failed bus accesses")
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/microblaze/op_helper.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c
> index f3b17a95b3..13ac476199 100644
> --- a/target/microblaze/op_helper.c
> +++ b/target/microblaze/op_helper.c
> @@ -490,12 +490,12 @@ void mb_cpu_transaction_failed(CPUState *cs, hwaddr 
> physaddr, vaddr addr,
>
>      env->sregs[SR_EAR] = addr;
>      if (access_type == MMU_INST_FETCH) {
> -        if ((env->pvr.regs[2] & PVR2_IOPB_BUS_EXC_MASK)) {
> +        if (cpu->cfg.iopb_bus_exception) {
>              env->sregs[SR_ESR] = ESR_EC_INSN_BUS;
>              helper_raise_exception(env, EXCP_HW_EXCP);
>          }
>      } else {
> -        if ((env->pvr.regs[2] & PVR2_DOPB_BUS_EXC_MASK)) {
> +        if (cpu->cfg.dopb_bus_exception) {
>              env->sregs[SR_ESR] = ESR_EC_DATA_BUS;
>              helper_raise_exception(env, EXCP_HW_EXCP);
>          }
> --
> 2.25.1
>
>