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Re: [PATCH v2 42/45] target/arm/vec_helper: Handle oprsz less than 16 by
From: |
Richard Henderson |
Subject: |
Re: [PATCH v2 42/45] target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations |
Date: |
Fri, 28 Aug 2020 16:17:12 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 8/28/20 11:33 AM, Peter Maydell wrote:
> In the gvec helper functions for indexed operations, for AArch32
> Neon the oprsz (total size of the vector) can be less than 16 bytes
> if the operation is on a D reg. Since the inner loop in these
> helpers always goes from 0 to segment, we must clamp it based
> on oprsz to avoid processing a full 16 byte segment when asked to
> handle an 8 byte wide vector.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> target/arm/vec_helper.c | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
- Re: [PATCH v2 38/45] target/arm: Implement fp16 for Neon VCVT fixed-point, (continued)
- [PATCH v2 39/45] target/arm: Implement fp16 for Neon VCVT with rounding modes, Peter Maydell, 2020/08/28
- [PATCH v2 43/45] target/arm/vec_helper: Add gvec fp indexed multiply-and-add operations, Peter Maydell, 2020/08/28
- [PATCH v2 40/45] target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-mode, Peter Maydell, 2020/08/28
- [PATCH v2 45/45] target/arm: Enable FP16 in '-cpu max', Peter Maydell, 2020/08/28
- [PATCH v2 42/45] target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations, Peter Maydell, 2020/08/28
- Re: [PATCH v2 42/45] target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations,
Richard Henderson <=
- [PATCH v2 41/45] target/arm: Implement fp16 for Neon VRINTX, Peter Maydell, 2020/08/28
- [PATCH v2 44/45] target/arm: Implement fp16 for Neon VMUL, VMLA, VMLS, Peter Maydell, 2020/08/28