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[PATCH 17/17] target/arm: refactor vae1_tlbmask()
From: |
remi . denis . courmont |
Subject: |
[PATCH 17/17] target/arm: refactor vae1_tlbmask() |
Date: |
Mon, 9 Nov 2020 16:10:20 +0200 |
From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
---
target/arm/helper.c | 25 +++++++++++--------------
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index f3edbca709..35540d7a2c 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -4468,26 +4468,23 @@ static CPAccessResult
aa64_cacheop_pou_access(CPUARMState *env,
static int vae1_tlbmask(CPUARMState *env)
{
uint64_t hcr = arm_hcr_el2_eff(env);
+ uint16_t mask;
if ((hcr & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE)) {
- uint16_t mask = ARMMMUIdxBit_E20_2 |
- ARMMMUIdxBit_E20_2_PAN |
- ARMMMUIdxBit_E20_0;
-
- if (arm_is_secure_below_el3(env)) {
- mask >>= ARM_MMU_IDX_A_NS;
- }
-
- return mask;
- } else if (arm_is_secure_below_el3(env)) {
- return ARMMMUIdxBit_SE10_1 |
- ARMMMUIdxBit_SE10_1_PAN |
- ARMMMUIdxBit_SE10_0;
+ mask = ARMMMUIdxBit_E20_2 |
+ ARMMMUIdxBit_E20_2_PAN |
+ ARMMMUIdxBit_E20_0;
} else {
- return ARMMMUIdxBit_E10_1 |
+ mask = ARMMMUIdxBit_E10_1 |
ARMMMUIdxBit_E10_1_PAN |
ARMMMUIdxBit_E10_0;
}
+
+ if (arm_is_secure_below_el3(env)) {
+ mask >>= ARM_MMU_IDX_A_NS;
+ }
+
+ return mask;
}
/* Return 56 if TBI is enabled, 64 otherwise. */
--
2.29.2
- [PATCH 04/17] target/arm: use arm_hcr_el2_eff() where applicable, (continued)
- [PATCH 04/17] target/arm: use arm_hcr_el2_eff() where applicable, remi . denis . courmont, 2020/11/09
- [PATCH 06/17] target/arm: declare new AA64PFR0 bit-fields, remi . denis . courmont, 2020/11/09
- [PATCH 11/17] target/arm: do S1_ptw_translate() before address space lookup, remi . denis . courmont, 2020/11/09
- [PATCH 08/17] target/arm: return the stage 2 index for stage 1, remi . denis . courmont, 2020/11/09
- [PATCH 09/17] target/arm: add MMU stage 1 for Secure EL2, remi . denis . courmont, 2020/11/09
- [PATCH 14/17] target/arm: set HPFAR_EL2.NS on secure stage 2 faults, remi . denis . courmont, 2020/11/09
- [PATCH 15/17] target/arm: add ARMv8.4-SEL2 extension, remi . denis . courmont, 2020/11/09
- [PATCH 17/17] target/arm: refactor vae1_tlbmask(),
remi . denis . courmont <=
- [PATCH 10/17] target/arm: add ARMv8.4-SEL2 system registers, remi . denis . courmont, 2020/11/09
- [PATCH 12/17] target/arm: secure stage 2 translation regime, remi . denis . courmont, 2020/11/09
- [PATCH 13/17] target/arm: handle VMID change in secure state, remi . denis . courmont, 2020/11/09
- [PATCH 16/17] target/arm: enable Secure EL2 in max CPU, remi . denis . courmont, 2020/11/09
- Re: [PATCHv2 00/17] ARM Secure EL2 extension, no-reply, 2020/11/09