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[PATCH 06/15] target/arm: Enforce M-profile VMRS/VMSR register restricti
From: |
Peter Maydell |
Subject: |
[PATCH 06/15] target/arm: Enforce M-profile VMRS/VMSR register restrictions |
Date: |
Mon, 16 Nov 2020 16:08:22 +0000 |
For M-profile before v8.1M, the only valid register for VMSR/VMRS is
the FPSCR. We have a comment that states this, but the actual logic
to forbid accesses for any other register value is missing, so we
would end up with A-profile style behaviour. Add the missing check.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-vfp.c.inc | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc
index daf39306d04..aee60ff98b3 100644
--- a/target/arm/translate-vfp.c.inc
+++ b/target/arm/translate-vfp.c.inc
@@ -622,7 +622,10 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS
*a)
* Accesses to R15 are UNPREDICTABLE; we choose to undef.
* (FPSCR -> r15 is a special case which writes to the PSR flags.)
*/
- if (a->rt == 15 && (!a->l || a->reg != ARM_VFP_FPSCR)) {
+ if (a->reg != ARM_VFP_FPSCR) {
+ return false;
+ }
+ if (a->rt == 15 && !a->l) {
return false;
}
}
--
2.20.1
- [PATCH 00/15] target/arm: More v8.1M features, Peter Maydell, 2020/11/16
- [PATCH 01/15] hw/intc/armv7m_nvic: Make all of system PPB range be RAZWI/BusFault, Peter Maydell, 2020/11/16
- [PATCH 02/15] target/arm: Implement v8.1M PXN extension, Peter Maydell, 2020/11/16
- [PATCH 05/15] target/arm: Implement CLRM instruction, Peter Maydell, 2020/11/16
- [PATCH 03/15] target/arm: Don't clobber ID_PFR1.Security on M-profile cores, Peter Maydell, 2020/11/16
- [PATCH 06/15] target/arm: Enforce M-profile VMRS/VMSR register restrictions,
Peter Maydell <=
- [PATCH 04/15] target/arm: Implement VSCCLRM insn, Peter Maydell, 2020/11/16
- [PATCH 07/15] target/arm: Refactor M-profile VMSR/VMRS handling, Peter Maydell, 2020/11/16
- [PATCH 08/15] target/arm: Move general-use constant expanders up in translate.c, Peter Maydell, 2020/11/16
- [PATCH 09/15] target/arm: Implement VLDR/VSTR system register, Peter Maydell, 2020/11/16
- [PATCH 10/15] target/arm: Implement M-profile FPSCR_nzcvqc, Peter Maydell, 2020/11/16
- [PATCH 11/15] target/arm: Use new FPCR_NZCV_MASK constant, Peter Maydell, 2020/11/16