[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH for-5.2?] target/arm: fix stage 2 page-walks in 32-bit emulat
From: |
Peter Maydell |
Subject: |
Re: [PATCH for-5.2?] target/arm: fix stage 2 page-walks in 32-bit emulation |
Date: |
Fri, 20 Nov 2020 16:38:42 +0000 |
On Thu, 19 Nov 2020 at 22:37, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 11/18/20 7:04 AM, Rémi Denis-Courmont wrote:
> > From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
> >
> > Using a target unsigned long would limit the Input Address to a LPAE
> > page-walk to 32 bits on AArch32 and 64 bits on AArch64. This is okay
> > for stage 1 or on AArch64, but it is insufficient for stage 2 on
> > AArch32. In that later case, the Input Address can have up to 40 bits.
> >
> > Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
> > ---
> > target/arm/helper.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
> Peter, bug fix for 5.2 or postpone?
Looks pretty safe so it seems reasonable to have in 5.2.
Interesting that it's taken so long for anybody to notice...
-- PMM