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Re: [PATCH v2 21/28] hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNM
From: |
Richard Henderson |
Subject: |
Re: [PATCH v2 21/28] hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNMIGN |
Date: |
Tue, 1 Dec 2020 09:16:28 -0600 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 11/19/20 3:56 PM, Peter Maydell wrote:
> + } else {
> + /* BFHFNMIGN is RAZ/WI from NS if AIRCR.BFHFNMINS is 0 */
> + if (!(cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK)) {
> + value &= ~R_V7M_CCR_BFHFNMIGN_MASK;
> + }
This isn't WI, as you're zeroing the bit not preserving it.
I think you need to merge the current state of the bit to preserve the value
for secure state.
r~
- Re: [PATCH v2 21/28] hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNMIGN,
Richard Henderson <=