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[PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CT
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From: |
Leif Lindholm |
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Subject: |
[PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h |
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Date: |
Tue, 15 Dec 2020 11:48:26 +0000 |
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
---
target/arm/cpu.h | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index fadd1a47df..90ba707b64 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1736,6 +1736,30 @@ FIELD(V7M_FPCCR, ASPEN, 31, 1)
/*
* System register ID fields.
*/
+FIELD(CLIDR_EL1, CTYPE1, 0, 3)
+FIELD(CLIDR_EL1, CTYPE2, 3, 3)
+FIELD(CLIDR_EL1, CTYPE3, 6, 3)
+FIELD(CLIDR_EL1, CTYPE4, 9, 3)
+FIELD(CLIDR_EL1, CTYPE5, 12, 3)
+FIELD(CLIDR_EL1, CTYPE6, 15, 3)
+FIELD(CLIDR_EL1, CTYPE7, 18, 3)
+FIELD(CLIDR_EL1, LOUIS, 21, 3)
+FIELD(CLIDR_EL1, LOC, 24, 3)
+FIELD(CLIDR_EL1, LOUU, 27, 3)
+FIELD(CLIDR_EL1, ICB, 30, 3)
+
+FIELD(CCSIDR_EL1, LINESIZE, 0, 3)
+FIELD(CCSIDR_EL1, ASSOCIATIVITY, 3, 21)
+FIELD(CCSIDR_EL1, NUMSETS, 32, 24)
+
+FIELD(CTR_EL0, IMINLINE, 0, 4)
+FIELD(CTR_EL0, L1IP, 14, 2)
+FIELD(CTR_EL0, DMINLINE, 16, 4)
+FIELD(CTR_EL0, ERG, 20, 4)
+FIELD(CTR_EL0, CWG, 24, 4)
+FIELD(CTR_EL0, IDC, 28, 1)
+FIELD(CTR_EL0, DIC, 29, 1)
+
FIELD(MIDR_EL1, REVISION, 0, 4)
FIELD(MIDR_EL1, PARTNUM, 4, 12)
FIELD(MIDR_EL1, ARCHITECTURE, 16, 4)
--
2.20.1
- [PATCH v2 0/5] target/arm: various changes to cpu.h, Leif Lindholm, 2020/12/15
- [PATCH v2 4/5] target/arm: add aarch64 ID register fields to cpu.h, Leif Lindholm, 2020/12/15
- [PATCH v2 1/5] target/arm: fix typo in cpu.h ID_AA64PFR1 field name, Leif Lindholm, 2020/12/15
- [PATCH v2 2/5] target/arm: make ARMCPU.clidr 64-bit, Leif Lindholm, 2020/12/15
- [PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h,
Leif Lindholm <=
- Re: [PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h, Laurent Desnogues, 2020/12/15
- Re: [PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h, Leif Lindholm, 2020/12/15
- Re: [PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h, Laurent Desnogues, 2020/12/17
- Re: [PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h, Leif Lindholm, 2020/12/17
- Re: [PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h, Laurent Desnogues, 2020/12/17
- Re: [PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h, Leif Lindholm, 2020/12/17
[PATCH v2 5/5] target/arm: add aarch32 ID register fields to cpu.h, Leif Lindholm, 2020/12/15
Re: [PATCH v2 0/5] target/arm: various changes to cpu.h, Peter Maydell, 2020/12/15