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[PATCH 10/18] target/arm: handle VMID change in secure state
From: |
remi . denis . courmont |
Subject: |
[PATCH 10/18] target/arm: handle VMID change in secure state |
Date: |
Fri, 18 Dec 2020 12:37:51 +0200 |
From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
The VTTBR write callback so far assumes that the underlying VM lies in
non-secure state. This handles the secure state scenario.
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 32469abf92..649c9237ce 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -4017,10 +4017,15 @@ static void vttbr_write(CPUARMState *env, const
ARMCPRegInfo *ri,
* the combined stage 1&2 tlbs (EL10_1 and EL10_0).
*/
if (raw_read(env, ri) != value) {
- tlb_flush_by_mmuidx(cs,
- ARMMMUIdxBit_E10_1 |
- ARMMMUIdxBit_E10_1_PAN |
- ARMMMUIdxBit_E10_0);
+ uint16_t mask = ARMMMUIdxBit_E10_1 |
+ ARMMMUIdxBit_E10_1_PAN |
+ ARMMMUIdxBit_E10_0;
+
+ if (arm_is_secure_below_el3(env)) {
+ mask >>= ARM_MMU_IDX_A_NS;
+ }
+
+ tlb_flush_by_mmuidx(cs, mask);
raw_write(env, ri, value);
}
}
--
2.29.2
- [PATCHv4 00/18] ARMv8.4-A Secure EL2, Rémi Denis-Courmont, 2020/12/18
- [PATCH 02/18] target/arm: add arm_is_el2_enabled() helper, remi . denis . courmont, 2020/12/18
- [PATCH 01/18] target/arm: remove redundant tests, remi . denis . courmont, 2020/12/18
- [PATCH 05/18] target/arm: factor MDCR_EL2 common handling, remi . denis . courmont, 2020/12/18
- [PATCH 04/18] target/arm: use arm_hcr_el2_eff() where applicable, remi . denis . courmont, 2020/12/18
- [PATCH 06/18] target/arm: declare new AA64PFR0 bit-fields, remi . denis . courmont, 2020/12/18
- [PATCH 07/18] target/arm: add 64-bit S-EL2 to EL exception table, remi . denis . courmont, 2020/12/18
- [PATCH 03/18] target/arm: use arm_is_el2_enabled() where applicable, remi . denis . courmont, 2020/12/18
- [PATCH 09/18] target/arm: add ARMv8.4-SEL2 system registers, remi . denis . courmont, 2020/12/18
- [PATCH 10/18] target/arm: handle VMID change in secure state,
remi . denis . courmont <=
- [PATCH 08/18] target/arm: add MMU stage 1 for Secure EL2, remi . denis . courmont, 2020/12/18
- [PATCH 13/18] target/arm: generalize 2-stage page-walk condition, remi . denis . courmont, 2020/12/18
- [PATCH 11/18] target/arm: do S1_ptw_translate() before address space lookup, remi . denis . courmont, 2020/12/18
- [PATCH 18/18] target/arm: refactor vae1_tlbmask(), remi . denis . courmont, 2020/12/18
- [PATCH 15/18] target/arm: set HPFAR_EL2.NS on secure stage 2 faults, remi . denis . courmont, 2020/12/18
- [PATCH 12/18] target/arm: translate NS bit in page-walks, remi . denis . courmont, 2020/12/18
- [PATCH 14/18] target/arm: secure stage 2 translation regime, remi . denis . courmont, 2020/12/18
- [PATCH 16/18] target/arm: add ARMv8.4-SEL2 extension, remi . denis . courmont, 2020/12/18
- [PATCH 17/18] target/arm: enable Secure EL2 in max CPU, remi . denis . courmont, 2020/12/18