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Re: [PATCH v2 06/24] target/arm: Adjust gen_aa32_{ld, st}_i64 for align+
From: |
Peter Maydell |
Subject: |
Re: [PATCH v2 06/24] target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endianness |
Date: |
Thu, 7 Jan 2021 16:02:27 +0000 |
On Tue, 8 Dec 2020 at 18:01, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Adjust the interface to match what has been done to the
> TCGv_i32 load/store functions.
>
> This is less obvious, because at present the only user of
> these functions, trans_VLDST_multiple, also wants to manipulate
> the endianness to speed up loading multiple bytes. Thus we
> retain an "internal" interface which is identical to the
> current gen_aa32_{ld,st}_i64 interface.
>
> The "new" interface will gain users as we remove the legacy
> interfaces, gen_aa32_ld64 and gen_aa32_st64.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
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