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[PATCH v3 16/30] target/arm: Enforce alignment for LDM/STM
From: |
Richard Henderson |
Subject: |
[PATCH v3 16/30] target/arm: Enforce alignment for LDM/STM |
Date: |
Mon, 11 Jan 2021 09:00:59 -1000 |
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index ba68d4d7f4..dbe74e2c34 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -7831,7 +7831,7 @@ static bool op_stm(DisasContext *s, arg_ldst_block *a,
int min_n)
} else {
tmp = load_reg(s, i);
}
- gen_aa32_st32(s, tmp, addr, mem_idx);
+ gen_aa32_st_i32(s, tmp, addr, mem_idx, MO_UL | MO_ALIGN);
tcg_temp_free_i32(tmp);
/* No need to add after the last transfer. */
@@ -7906,7 +7906,7 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a,
int min_n)
}
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(s, tmp, addr, mem_idx);
+ gen_aa32_ld_i32(s, tmp, addr, mem_idx, MO_UL | MO_ALIGN);
if (user) {
tmp2 = tcg_const_i32(i);
gen_helper_set_user_reg(cpu_env, tmp2, tmp);
--
2.25.1
- [PATCH v3 12/30] target/arm: Fix SCTLR_B test for TCGv_i64 load/store, (continued)
- [PATCH v3 12/30] target/arm: Fix SCTLR_B test for TCGv_i64 load/store, Richard Henderson, 2021/01/11
- [PATCH v3 13/30] target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endianness, Richard Henderson, 2021/01/11
- [PATCH v3 14/30] target/arm: Enforce word alignment for LDRD/STRD, Richard Henderson, 2021/01/11
- [PATCH v3 20/30] target/arm: Enforce alignment for VLDR/VSTR, Richard Henderson, 2021/01/11
- [PATCH v3 21/30] target/arm: Enforce alignment for VLDn (all lanes), Richard Henderson, 2021/01/11
- [PATCH v3 17/30] target/arm: Enforce alignment for RFE, Richard Henderson, 2021/01/11
- [PATCH v3 18/30] target/arm: Enforce alignment for SRS, Richard Henderson, 2021/01/11
- [PATCH v3 23/30] target/arm: Enforce alignment for VLDn/VSTn (single), Richard Henderson, 2021/01/11
- [PATCH v3 28/30] target/arm: Enforce alignment for aa64 vector LDn/STn (multiple), Richard Henderson, 2021/01/11
- [PATCH v3 27/30] target/arm: Use MemOp for size + endian in aa64 vector ld/st, Richard Henderson, 2021/01/11
- [PATCH v3 16/30] target/arm: Enforce alignment for LDM/STM,
Richard Henderson <=
- [PATCH v3 26/30] target/arm: Enforce alignment for aa64 load-acq/store-rel, Richard Henderson, 2021/01/11
- [PATCH v3 30/30] target/arm: Enforce alignment for sve LD1R, Richard Henderson, 2021/01/11
- [PATCH v3 15/30] target/arm: Enforce alignment for LDA/LDAH/STL/STLH, Richard Henderson, 2021/01/11
- [PATCH v3 19/30] target/arm: Enforce alignment for VLDM/VSTM, Richard Henderson, 2021/01/11
- [PATCH v3 22/30] target/arm: Enforce alignment for VLDn/VSTn (multiple), Richard Henderson, 2021/01/11
- [PATCH v3 24/30] target/arm: Use finalize_memop for aa64 gpr load/store, Richard Henderson, 2021/01/11
- [PATCH v3 25/30] target/arm: Use finalize_memop for aa64 fpr load/store, Richard Henderson, 2021/01/11
- [PATCH v3 29/30] target/arm: Enforce alignment for aa64 vector LDn/STn (single), Richard Henderson, 2021/01/11