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[RFC PATCH v6 04/11] hw/ssi: imx_spi: Reduce 'change_mask' variable scop
From: |
Philippe Mathieu-Daudé |
Subject: |
[RFC PATCH v6 04/11] hw/ssi: imx_spi: Reduce 'change_mask' variable scope |
Date: |
Tue, 12 Jan 2021 19:35:22 +0100 |
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/ssi/imx_spi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index 35ab33c0511..bcc535f2893 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -303,7 +303,6 @@ static void imx_spi_write(void *opaque, hwaddr offset,
uint64_t value,
{
IMXSPIState *s = opaque;
uint32_t index = offset >> 2;
- uint32_t change_mask;
if (index >= ECSPI_MAX) {
qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%"
@@ -313,7 +312,6 @@ static void imx_spi_write(void *opaque, hwaddr offset,
uint64_t value,
trace_imx_spi_write(index, imx_spi_reg_name(index), value);
- change_mask = s->regs[index] ^ value;
switch (index) {
case ECSPI_RXDATA:
@@ -357,6 +355,7 @@ static void imx_spi_write(void *opaque, hwaddr offset,
uint64_t value,
}
if (imx_spi_channel_is_master(s)) {
+ uint32_t change_mask = s->regs[index] ^ value;
int i;
/* We are in master mode */
--
2.26.2
- [RFC PATCH v6 00/11] hw/ssi: imx_spi: Fix various bugs in the imx_spi model, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 05/11] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 06/11] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 07/11] hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 08/11] hw/ssi: imx_spi: Disable chip selects when controller is disabled, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 09/11] hw/ssi: imx_spi: Round up the burst length to be multiple of 8, Philippe Mathieu-Daudé, 2021/01/12