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[PATCH v5 22/31] target/arm: Use the proper TBI settings for linux-user
From: |
Richard Henderson |
Subject: |
[PATCH v5 22/31] target/arm: Use the proper TBI settings for linux-user |
Date: |
Wed, 3 Feb 2021 09:00:01 -1000 |
We were fudging TBI1 enabled to speed up the generated code.
Now that we've improved the code generation, remove this.
Also, tidy the comment to reflect the current code.
The pauth test was testing a kernel address (-1) and making
incorrect assumptions about TBI1; stick to userland addresses.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/internals.h | 4 ++--
target/arm/cpu.c | 10 +++-------
tests/tcg/aarch64/pauth-2.c | 1 -
3 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 853fa88fd6..6efe0c303e 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1413,9 +1413,9 @@ static inline bool tcma_check(uint32_t desc, int bit55,
int ptr_tag)
*/
static inline uint64_t useronly_clean_ptr(uint64_t ptr)
{
- /* TBI is known to be enabled. */
#ifdef CONFIG_USER_ONLY
- ptr = sextract64(ptr, 0, 56);
+ /* TBI0 is known to be enabled, while TBI1 is disabled. */
+ ptr &= sextract64(ptr, 0, 56);
#endif
return ptr;
}
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 40142ac141..db81a12418 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -200,14 +200,10 @@ static void arm_cpu_reset(DeviceState *dev)
env->vfp.zcr_el[1] = MIN(cpu->sve_max_vq - 1, 3);
}
/*
- * Enable TBI0 and TBI1. While the real kernel only enables TBI0,
- * turning on both here will produce smaller code and otherwise
- * make no difference to the user-level emulation.
- *
- * In sve_probe_page, we assume that this is set.
- * Do not modify this without other changes.
+ * Enable TBI0 but not TBI1.
+ * Note that this must match useronly_clean_ptr.
*/
- env->cp15.tcr_el[1].raw_tcr = (3ULL << 37);
+ env->cp15.tcr_el[1].raw_tcr = (1ULL << 37);
#else
/* Reset into the highest available EL */
if (arm_feature(env, ARM_FEATURE_EL3)) {
diff --git a/tests/tcg/aarch64/pauth-2.c b/tests/tcg/aarch64/pauth-2.c
index 9bba0beb63..978652ede3 100644
--- a/tests/tcg/aarch64/pauth-2.c
+++ b/tests/tcg/aarch64/pauth-2.c
@@ -53,7 +53,6 @@ void do_test(uint64_t value)
int main()
{
do_test(0);
- do_test(-1);
do_test(0xda004acedeadbeefull);
return 0;
}
--
2.25.1
- [PATCH v5 16/31] linux-user: Use cpu_untagged_addr in access_ok; split out *_untagged, (continued)
- [PATCH v5 16/31] linux-user: Use cpu_untagged_addr in access_ok; split out *_untagged, Richard Henderson, 2021/02/03
- [PATCH v5 17/31] linux-user: Move lock_user et al out of line, Richard Henderson, 2021/02/03
- [PATCH v5 18/31] linux-user: Fix types in uaccess.c, Richard Henderson, 2021/02/03
- [PATCH v5 19/31] linux-user: Handle tags in lock_user/unlock_user, Richard Henderson, 2021/02/03
- [PATCH v5 20/31] linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE, Richard Henderson, 2021/02/03
- [PATCH v5 22/31] target/arm: Use the proper TBI settings for linux-user,
Richard Henderson <=
- [PATCH v5 21/31] target/arm: Improve gen_top_byte_ignore, Richard Henderson, 2021/02/03
- [PATCH v5 26/31] linux-user/aarch64: Pass syndrome to EXC_*_ABORT, Richard Henderson, 2021/02/03
- [PATCH v5 23/31] linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG, Richard Henderson, 2021/02/03
- [PATCH v5 25/31] target/arm: Split out syndrome.h from internals.h, Richard Henderson, 2021/02/03
- [PATCH v5 24/31] linux-user/aarch64: Implement PROT_MTE, Richard Henderson, 2021/02/03
- [PATCH v5 29/31] target/arm: Add allocation tag storage for user mode, Richard Henderson, 2021/02/03
- [PATCH v5 30/31] target/arm: Enable MTE for user-only, Richard Henderson, 2021/02/03
- [PATCH v5 31/31] tests/tcg/aarch64: Add mte smoke tests, Richard Henderson, 2021/02/03
- Re: [PATCH v5 00/31] target-arm: Implement ARMv8.5-MemTag, user mode, no-reply, 2021/02/03