Re: TCG and MTTCG questions

[Shinkevich Andrey]

+ qemu-arm@, qemu-devel@, richard.henderson@

 

Dear Alex,

 

Thank you so much for your quick response and for answering my questions. It was helpful.

I would like to subscribe for the mailing list regarding the TCG, MTTCG and ARM development progress in QEMU.

To see what I could contribute, I will want to test my cases and investigate the QEMU code more carefully, including the patches you were referring to. Then I will come back with details.

The main idea currently is to accelerate the instruction translation in case of the ARMv8 guest on the x86_64 host and to add instructions that have not been supported yet, if any.

A particular challenge I am trying to cope with now is to test on the nested QEMU VMs (ARM guest on x86 host VM). That is not a good approach but the only available for me now. If you advise me the pros and cons of such a testing model, I will appreciate.

 

Kind regards,

Andrey Shinkevich

 

03.02.2021, 20:09, "Alex Bennée" <alex.bennee@linaro.org>:

Shinkevich Andrey <a-shinkevich@yandex.ru> writes:
 

 Dear Alex,
  
 My name is Andrey Shinkevich. I used to contribute into the QEMU project (block layer). Now I turned my mind to the TCG and MTTCG.
 Would you please answer some questions?

Sure. In future please just ask on qemu-devel (and cc me) so others can
(hopefully) benefit from the discourse.
 

  
 I would like to install a Linux ARM64 guest on the VM running on a Linux x86_64 host. Both systems are the CentOS.
  
 1. Which supported machine (listed with “qemu-system-aarch64 -M help” command) is good to translate the AArch64 instruction set
 (ARMv8) to the x86_64 CPU platform?

If all you are interested in is the ARMv8 platform then by far the best
machine is -M virt which can run with all the v8 CPUs including -cpu max.
 

 2. If not supported by QEMU yet, or if it is turned out that not all instructions are supported by the TCG, what qualifications are required to
 implement them in TCG? I mean the specialist(s) qualified in Assembly for AArch64 and x86_64, or in Linux KVM and Linux kernel Memory
 Manager, or else in GCC compiler, etc..

Nothing more than reading the ARM ARM and being able to follow the code.
The TCG is similar to a compiler but different enough to be it's own
thing. We have pretty good coverage of the ARMv8 ISA, most new
instructions are system level ones for new features. The biggest
outstanding set is SVE2 and MTE for which there are patches on list.

Is there anything in particular you are interested in?
 

 3. Whom may I contact to contribute into the QEMU MTTCG
 implementation?

All development takes place on qemu-devel. You can CC me and the TCG and
ARM maintainers (which you can configure git to do when you send patches
automatically).
 

 4. Where can I find an up-to-date list of challenges of the TCG and
 MTTCG implementation to participate as a contributor?

I'm afraid:

  https://wiki.qemu.org/Features/tcg-multithread

is about as upto date as you'll find. MTTCG is considered feature
complete. Two big tasks that remain are:

  - reducing BQL contention (see patches from robert.foley@linaro.org on
    the list, currently stalled as he moved on)

  - implementing strong-on-weak MTTCG (highly likely to suck performance
    wise, but someone needs to try and measure it to see if it's worth while)
 

 If some of my questions cannot be answered, refer me to the qualified person please.
  
 I am looking forward to hearing from you.
 Thank you.
  
 Kind regards,
 Andrey Shinkevich

 

--
Alex Bennée