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[PATCH 30/44] hw/arm/armsse: Add missing SSE-200 SYS_PPU
From: |
Peter Maydell |
Subject: |
[PATCH 30/44] hw/arm/armsse: Add missing SSE-200 SYS_PPU |
Date: |
Fri, 19 Feb 2021 14:46:03 +0000 |
We forgot to implement a TYPE_UNIMPLEMENTED_DEVICE stub
for the SYS_PPU in the SSE-200, which is at 0x50022000.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/armsse.h | 2 +-
hw/arm/armsse.c | 9 +++++++++
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
index eb4e937173f..104ba8d26ec 100644
--- a/include/hw/arm/armsse.h
+++ b/include/hw/arm/armsse.h
@@ -135,7 +135,7 @@ OBJECT_DECLARE_TYPE(ARMSSE, ARMSSEClass,
#define SSE_MAX_CPUS 2
-#define NUM_PPUS 7
+#define NUM_PPUS 8
/* Number of CPU IRQs used by the SSE itself */
#define NUM_SSE_IRQS 32
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index f72d1adafea..f43f0524e28 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -320,6 +320,15 @@ static const ARMSSEDeviceInfo sse200_devices[] = {
.ppc = NO_PPC,
.irq = NO_IRQ,
},
+ {
+ .name = "SYS_PPU",
+ .type = TYPE_UNIMPLEMENTED_DEVICE,
+ .index = 7,
+ .addr = 0x50022000,
+ .size = 0x1000,
+ .ppc = NO_PPC,
+ .irq = NO_IRQ,
+ },
{
.name = NULL,
}
--
2.20.1
- [PATCH 20/44] hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block, (continued)
- [PATCH 20/44] hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block, Peter Maydell, 2021/02/19
- [PATCH 34/44] hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block, Peter Maydell, 2021/02/19
- [PATCH 35/44] hw/arm/armsse: Add SSE-300 support, Peter Maydell, 2021/02/19
- [PATCH 41/44] hw/arm/mps2-tz: Make initsvtor0 setting board-specific, Peter Maydell, 2021/02/19
- [PATCH 38/44] hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register, Peter Maydell, 2021/02/19
- [PATCH 40/44] hw/arm/mps2-tz: Support running APB peripherals on different clock, Peter Maydell, 2021/02/19
- [PATCH 39/44] hw/misc/mps2-scc: Implement changes for AN547, Peter Maydell, 2021/02/19
- [PATCH 26/44] hw/arm/armsse: Move s32ktimer into data-driven framework, Peter Maydell, 2021/02/19
- [PATCH 28/44] hw/arm/armsse: Move sysctl register block into data-driven framework, Peter Maydell, 2021/02/19
- [PATCH 25/44] hw/arm/armsse: Move watchdogs into data-driven framework, Peter Maydell, 2021/02/19
- [PATCH 30/44] hw/arm/armsse: Add missing SSE-200 SYS_PPU,
Peter Maydell <=
- [PATCH 44/44] tests/qtest/sse-timer-test: Add simple tests of the SSE timer and counter, Peter Maydell, 2021/02/19
- [PATCH 29/44] hw/arm/armsse: Move PPUs into data-driven framework, Peter Maydell, 2021/02/19
- [PATCH 32/44] hw/arm/armsse: Add support for SSE variants with a system counter, Peter Maydell, 2021/02/19
- [PATCH 37/44] hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate, Peter Maydell, 2021/02/19
- [PATCH 36/44] hw/arm/mps2-tz: Make UART overflow IRQ board-specific, Peter Maydell, 2021/02/19
- [PATCH 42/44] hw/arm/mps2-tz: Add new mps3-an547 board, Peter Maydell, 2021/02/19
- [PATCH 43/44] docs/system/arm/mps2.rst: Document the new mps3-an547 board, Peter Maydell, 2021/02/19
- Re: [PATCH 00/44] hw/arm: New board model mps3-an547, no-reply, 2021/02/19