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Re: [PATCH] hw/display/xlnx_dp: fix an out-of-bounds read in xlnx_dp_rea
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PATCH] hw/display/xlnx_dp: fix an out-of-bounds read in xlnx_dp_read |
Date: |
Tue, 13 Jul 2021 12:20:01 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
On 7/13/21 5:14 AM, Qiang Liu wrote:
> xlnx_dp_read allows an out-of-bounds read at its default branch because
> of an improper index.
>
> According to
> https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html
> (DP Module), registers 0x3A4/0x3A4/0x3AC are allowed.
>
> DP_INT_MASK 0x000003A4 32 mixed 0xFFFFF03F Interrupt Mask
> Register for intrN.
> DP_INT_EN 0x000003A8 32 mixed 0x00000000 Interrupt
> Enable Register.
> DP_INT_DS 0x000003AC 32 mixed 0x00000000 Interrupt
> Disable Register.
>
> In xlnx_dp_write, when the offset is 0x3A8 and 0x3AC, the virtual device
> will write s->core_registers[0x3A4
>>> 2]. That is to say, the maxize of s->core_registers could be ((0x3A4
>>> 2) + 1). However, the current size of s->core_registers is (0x3AF >>
>>> 2), that is ((0x3A4 >> 2) + 2), which is out of the range.
> In xlxn_dp_read, the access to offset 0x3A8 or 0x3AC will be directed to
> the offset 0x3A8 (incorrect functionality) or 0x3AC (out-of-bounds read)
> rather than 0x3A4.
>
> This patch adjusts the size of s->core_registers and enforces the read
> access to offset 0x3A* and 0x3AC to 0x3A4. BTW, because the size of this
> MMIO region is 0x3AF, this patch also removes the assertion in
> xlnx_dp_write.
>
> Fixes: 58ac482a66de ("introduce xlnx-dp")
> Signed-off-by: Qiang Liu <cyruscyliu@gmail.com>
> ---
> hw/display/xlnx_dp.c | 7 ++++---
> include/hw/display/xlnx_dp.h | 2 +-
> 2 files changed, 5 insertions(+), 4 deletions(-)
Can you provide a qtest reproducer please?
> diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c
> index 7bcbb13..8903181 100644
> --- a/hw/display/xlnx_dp.c
> +++ b/hw/display/xlnx_dp.c
> @@ -713,8 +713,10 @@ static uint64_t xlnx_dp_read(void *opaque, hwaddr
> offset, unsigned size)
> ret = 0;
> break;
> default:
> - assert(offset <= (0x3AC >> 2));
> - ret = s->core_registers[offset];
> + if (offset == (0x3A8 >> 2) || offset == (0x3AC >> 2))
> + ret = s->core_registers[DP_INT_MASK];
> + else
Invalid code style.
> + ret = s->core_registers[offset];
> break;
> }
>
> @@ -876,7 +878,6 @@ static void xlnx_dp_write(void *opaque, hwaddr offset,
> uint64_t value,
> xlnx_dp_update_irq(s);
> break;
> default:
> - assert(offset <= (0x504C >> 2));
> s->core_registers[offset] = value;
> break;
> }
> diff --git a/include/hw/display/xlnx_dp.h b/include/hw/display/xlnx_dp.h
> index e85e428..99a6d47 100644
> --- a/include/hw/display/xlnx_dp.h
> +++ b/include/hw/display/xlnx_dp.h
> @@ -39,7 +39,7 @@
> #define AUD_CHBUF_MAX_DEPTH (32 * KiB)
> #define MAX_QEMU_BUFFER_SIZE (4 * KiB)
>
> -#define DP_CORE_REG_ARRAY_SIZE (0x3AF >> 2)
> +#define DP_CORE_REG_ARRAY_SIZE (0x3A8 >> 2)
NAck: this breaks migration.
> #define DP_AVBUF_REG_ARRAY_SIZE (0x238 >> 2)
> #define DP_VBLEND_REG_ARRAY_SIZE (0x1DF >> 2)
> #define DP_AUDIO_REG_ARRAY_SIZE (0x50 >> 2)
>