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Re: [PATCH v1 2/2] hw/arm/xlnx-zynqmp: Connect 4 TTC timers
From: |
Luc Michel |
Subject: |
Re: [PATCH v1 2/2] hw/arm/xlnx-zynqmp: Connect 4 TTC timers |
Date: |
Fri, 1 Apr 2022 09:11:48 +0200 |
On 00:20 Fri 01 Apr , Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@amd.com>
>
> Connect the 4 TTC timers on the ZynqMP.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Luc Michel <luc@lmichel.fr>
> ---
> include/hw/arm/xlnx-zynqmp.h | 4 ++++
> hw/arm/xlnx-zynqmp.c | 22 ++++++++++++++++++++++
> 2 files changed, 26 insertions(+)
>
> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> index 9d9a9d0bf9..85fd9f53da 100644
> --- a/include/hw/arm/xlnx-zynqmp.h
> +++ b/include/hw/arm/xlnx-zynqmp.h
> @@ -41,6 +41,7 @@
> #include "hw/or-irq.h"
> #include "hw/misc/xlnx-zynqmp-apu-ctrl.h"
> #include "hw/misc/xlnx-zynqmp-crf.h"
> +#include "hw/timer/cadence_ttc.h"
>
> #define TYPE_XLNX_ZYNQMP "xlnx-zynqmp"
> OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
> @@ -84,6 +85,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
> #define XLNX_ZYNQMP_MAX_RAM_SIZE (XLNX_ZYNQMP_MAX_LOW_RAM_SIZE + \
> XLNX_ZYNQMP_MAX_HIGH_RAM_SIZE)
>
> +#define XLNX_ZYNQMP_NUM_TTC 4
> +
> /*
> * Unimplemented mmio regions needed to boot some images.
> */
> @@ -128,6 +131,7 @@ struct XlnxZynqMPState {
> qemu_or_irq qspi_irq_orgate;
> XlnxZynqMPAPUCtrl apu_ctrl;
> XlnxZynqMPCRF crf;
> + CadenceTTCState ttc[XLNX_ZYNQMP_NUM_TTC];
>
> char *boot_cpu;
> ARMCPU *boot_cpu_ptr;
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index 5bfe285a19..375309e68e 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -68,6 +68,9 @@
> #define APU_ADDR 0xfd5c0000
> #define APU_IRQ 153
>
> +#define TTC0_ADDR 0xFF110000
> +#define TTC0_IRQ 36
> +
> #define IPI_ADDR 0xFF300000
> #define IPI_IRQ 64
>
> @@ -316,6 +319,24 @@ static void xlnx_zynqmp_create_crf(XlnxZynqMPState *s,
> qemu_irq *gic)
> sysbus_connect_irq(sbd, 0, gic[CRF_IRQ]);
> }
>
> +static void xlnx_zynqmp_create_ttc(XlnxZynqMPState *s, qemu_irq *gic)
> +{
> + SysBusDevice *sbd;
> + int i, irq;
> +
> + for (i = 0; i < XLNX_ZYNQMP_NUM_TTC; i++) {
> + object_initialize_child(OBJECT(s), "ttc[*]", &s->ttc[i],
> + TYPE_CADENCE_TTC);
> + sbd = SYS_BUS_DEVICE(&s->ttc[i]);
> +
> + sysbus_realize(sbd, &error_fatal);
> + sysbus_mmio_map(sbd, 0, TTC0_ADDR + i * 0x10000);
> + for (irq = 0; irq < 3; irq++) {
> + sysbus_connect_irq(sbd, irq, gic[TTC0_IRQ + i * 3 + irq]);
> + }
> + }
> +}
> +
> static void xlnx_zynqmp_create_unimp_mmio(XlnxZynqMPState *s)
> {
> static const struct UnimpInfo {
> @@ -721,6 +742,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error
> **errp)
> xlnx_zynqmp_create_efuse(s, gic_spi);
> xlnx_zynqmp_create_apu_ctrl(s, gic_spi);
> xlnx_zynqmp_create_crf(s, gic_spi);
> + xlnx_zynqmp_create_ttc(s, gic_spi);
> xlnx_zynqmp_create_unimp_mmio(s);
>
> for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {
> --
> 2.25.1
>
--