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[PATCH v1 0/4] hw/arm: versal: Add Cortex-R5s and CRL
From: |
Edgar E. Iglesias |
Subject: |
[PATCH v1 0/4] hw/arm: versal: Add Cortex-R5s and CRL |
Date: |
Wed, 6 Apr 2022 18:42:59 +0100 |
From: "Edgar E. Iglesias" <edgar.iglesias@amd.com>
This adds the Versal Cortex-R5s in the Real-Time Processing Unit
(RPU) subsystem.
A model of the Clock/Reset Low-power domain (CRL) is also added
allowing runtime release of the Cortex-R5s. The RPU subsystem
is largely missing but has enough to run simple bare-metal R5
apps.
Cheers,
Edgar
Edgar E. Iglesias (4):
hw/arm: versal: Create an APU CPU Cluster
hw/arm: versal: Add the Cortex-R5Fs
hw/misc: Add a model of the Xilinx Versal CRL
hw/arm: versal: Connect the CRL
hw/arm/xlnx-versal-virt.c | 6 +-
hw/arm/xlnx-versal.c | 99 ++++++-
hw/misc/meson.build | 1 +
hw/misc/xlnx-versal-crl.c | 421 ++++++++++++++++++++++++++++++
include/hw/arm/xlnx-versal.h | 16 ++
include/hw/misc/xlnx-versal-crl.h | 235 +++++++++++++++++
6 files changed, 772 insertions(+), 6 deletions(-)
create mode 100644 hw/misc/xlnx-versal-crl.c
create mode 100644 include/hw/misc/xlnx-versal-crl.h
--
2.25.1
- [PATCH v1 0/4] hw/arm: versal: Add Cortex-R5s and CRL,
Edgar E. Iglesias <=