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[PATCH 10/16] target/arm: Add isar_feature_{aa64,any}_ras
From: |
Richard Henderson |
Subject: |
[PATCH 10/16] target/arm: Add isar_feature_{aa64,any}_ras |
Date: |
Fri, 8 Apr 2022 17:07:36 -0700 |
Add the aa64 predicate for detecting RAS support from id registers.
We already have the aa32 version from the M-profile work.
Add the 'any' predicate for testing both aa64 and aa32.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 9c456ff23a..890001f26b 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -4208,6 +4208,11 @@ static inline bool isar_feature_aa64_aa32_el1(const
ARMISARegisters *id)
return FIELD_EX64(id->id_aa64pfr0, ID_AA64PFR0, EL1) >= 2;
}
+static inline bool isar_feature_aa64_ras(const ARMISARegisters *id)
+{
+ return FIELD_EX64(id->id_aa64pfr0, ID_AA64PFR0, RAS) != 0;
+}
+
static inline bool isar_feature_aa64_sve(const ARMISARegisters *id)
{
return FIELD_EX64(id->id_aa64pfr0, ID_AA64PFR0, SVE) != 0;
@@ -4430,6 +4435,11 @@ static inline bool isar_feature_any_debugv8p2(const
ARMISARegisters *id)
return isar_feature_aa64_debugv8p2(id) || isar_feature_aa32_debugv8p2(id);
}
+static inline bool isar_feature_any_ras(const ARMISARegisters *id)
+{
+ return isar_feature_aa64_ras(id) || isar_feature_aa32_ras(id);
+}
+
/*
* Forward to the above feature tests given an ARMCPU pointer.
*/
--
2.25.1
- [PATCH 11/16] target/arm: Add minimal RAS registers, (continued)
[PATCH 15/16] target/arm: Enable FEAT_RAS for -cpu max, Richard Henderson, 2022/04/08
[PATCH 10/16] target/arm: Add isar_feature_{aa64,any}_ras,
Richard Henderson <=
[PATCH 13/16] target/arm: Implement virtual SError exceptions, Richard Henderson, 2022/04/08
[PATCH 16/16] target/arm: Enable FEAT_IESB for -cpu max, Richard Henderson, 2022/04/08