[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 5/7] target/arm: Enable FEAT_DGH for -cpu max
From: |
Richard Henderson |
Subject: |
[PATCH 5/7] target/arm: Enable FEAT_DGH for -cpu max |
Date: |
Sat, 9 Apr 2022 22:57:23 -0700 |
This extension concerns not merging memory access, which TCG does
not implement. Thus we can trivially enable this feature.
Add a comment to handle_hint for the DGH instruction, but no code.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu64.c | 1 +
target/arm/translate-a64.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index a0429538cc..199ca437a0 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -795,6 +795,7 @@ static void aarch64_max_initfn(Object *obj)
t = FIELD_DP64(t, ID_AA64ISAR1, SB, 1); /* FEAT_SB */
t = FIELD_DP64(t, ID_AA64ISAR1, SPECRES, 1); /* FEAT_SPECRES */
t = FIELD_DP64(t, ID_AA64ISAR1, BF16, 1); /* FEAT_BF16 */
+ t = FIELD_DP64(t, ID_AA64ISAR1, DGH, 1); /* FEAT_DGH */
t = FIELD_DP64(t, ID_AA64ISAR1, I8MM, 1); /* FEAT_I8MM */
cpu->isar.id_aa64isar1 = t;
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index cc54dff83c..c3c1a19dea 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -1442,6 +1442,7 @@ static void handle_hint(DisasContext *s, uint32_t insn,
break;
case 0b00100: /* SEV */
case 0b00101: /* SEVL */
+ case 0b00110: /* DGH */
/* we treat all as NOP at least for now */
break;
case 0b00111: /* XPACLRI */
--
2.25.1
- [PATCH 0/7] target/arm: More trivial features, A76, N1, Richard Henderson, 2022/04/10
- [PATCH 1/7] target/arm: Enable FEAT_CSV2 for -cpu max, Richard Henderson, 2022/04/10
- [PATCH 2/7] target/arm: Update ISAR fields for ARMv8.8, Richard Henderson, 2022/04/10
- [PATCH 4/7] target/arm: Enable FEAT_CSV3 for -cpu max, Richard Henderson, 2022/04/10
- [PATCH 3/7] target/arm: Enable FEAT_CSV2_2 for -cpu max, Richard Henderson, 2022/04/10
- [PATCH 5/7] target/arm: Enable FEAT_DGH for -cpu max,
Richard Henderson <=
- [PATCH 6/7] target/arm: Define cortex-a76, Richard Henderson, 2022/04/10
- [PATCH 7/7] target/arm: Define neoverse-n1, Richard Henderson, 2022/04/10