[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 50/60] target/arm: Enable SCR and HCR bits for RAS
From: |
Richard Henderson |
Subject: |
[PATCH v3 50/60] target/arm: Enable SCR and HCR bits for RAS |
Date: |
Sun, 17 Apr 2022 10:44:16 -0700 |
Enable writes to the TERR and TEA bits when RAS is enabled.
These bits are otherwise RES0.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 655beba3d6..f6468fed43 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -1756,6 +1756,9 @@ static void scr_write(CPUARMState *env, const
ARMCPRegInfo *ri, uint64_t value)
}
valid_mask &= ~SCR_NET;
+ if (cpu_isar_feature(aa64_ras, cpu)) {
+ valid_mask |= SCR_TERR;
+ }
if (cpu_isar_feature(aa64_lor, cpu)) {
valid_mask |= SCR_TLOR;
}
@@ -1770,6 +1773,9 @@ static void scr_write(CPUARMState *env, const
ARMCPRegInfo *ri, uint64_t value)
}
} else {
valid_mask &= ~(SCR_RW | SCR_ST);
+ if (cpu_isar_feature(aa32_ras, cpu)) {
+ valid_mask |= SCR_TERR;
+ }
}
if (!arm_feature(env, ARM_FEATURE_EL2)) {
@@ -5126,6 +5132,9 @@ static void do_hcr_write(CPUARMState *env, uint64_t
value, uint64_t valid_mask)
if (cpu_isar_feature(aa64_vh, cpu)) {
valid_mask |= HCR_E2H;
}
+ if (cpu_isar_feature(aa64_ras, cpu)) {
+ valid_mask |= HCR_TERR | HCR_TEA;
+ }
if (cpu_isar_feature(aa64_lor, cpu)) {
valid_mask |= HCR_TLOR;
}
--
2.25.1
- [PATCH v3 41/60] target/arm: Update qemu-system-arm -cpu max to cortex-a57, (continued)
- [PATCH v3 41/60] target/arm: Update qemu-system-arm -cpu max to cortex-a57, Richard Henderson, 2022/04/17
- [PATCH v3 43/60] target/arm: Split out aa32_max_features, Richard Henderson, 2022/04/17
- [PATCH v3 45/60] target/arm: Use field names for manipulating EL2 and EL3 modes, Richard Henderson, 2022/04/17
- [PATCH v3 44/60] target/arm: Annotate arm_max_initfn with FEAT identifiers, Richard Henderson, 2022/04/17
- [PATCH v3 46/60] target/arm: Enable FEAT_Debugv8p2 for -cpu max, Richard Henderson, 2022/04/17
- [PATCH v3 47/60] target/arm: Enable FEAT_Debugv8p4 for -cpu max, Richard Henderson, 2022/04/17
- [PATCH v3 48/60] target/arm: Add isar_feature_{aa64,any}_ras, Richard Henderson, 2022/04/17
- [PATCH v3 49/60] target/arm: Add minimal RAS registers, Richard Henderson, 2022/04/17
- [PATCH v3 50/60] target/arm: Enable SCR and HCR bits for RAS,
Richard Henderson <=
- [PATCH v3 52/60] target/arm: Implement ESB instruction, Richard Henderson, 2022/04/17
- [PATCH v3 53/60] target/arm: Enable FEAT_RAS for -cpu max, Richard Henderson, 2022/04/17
- [PATCH v3 51/60] target/arm: Implement virtual SError exceptions, Richard Henderson, 2022/04/17
- [PATCH v3 54/60] target/arm: Enable FEAT_IESB for -cpu max, Richard Henderson, 2022/04/17
- [PATCH v3 55/60] target/arm: Enable FEAT_CSV2 for -cpu max, Richard Henderson, 2022/04/17
- [PATCH v3 56/60] target/arm: Enable FEAT_CSV2_2 for -cpu max, Richard Henderson, 2022/04/17
- [PATCH v3 57/60] target/arm: Enable FEAT_CSV3 for -cpu max, Richard Henderson, 2022/04/17