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Re: [PATCH v3 08/60] target/arm: Change DisasContext.thumb to bool
From: |
Alex Bennée |
Subject: |
Re: [PATCH v3 08/60] target/arm: Change DisasContext.thumb to bool |
Date: |
Fri, 22 Apr 2022 14:59:19 +0100 |
User-agent: |
mu4e 1.7.13; emacs 28.1.50 |
Richard Henderson <richard.henderson@linaro.org> writes:
> Bool is a more appropriate type for this value.
> Move the member down in the struct to keep the
> bool type members together and remove a hole.
Does gcc even attempt to pack bools? Aren't they basically int types?
Anyway:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/arm/translate.h | 2 +-
> target/arm/translate-a64.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/arm/translate.h b/target/arm/translate.h
> index 8b7dd1a4c0..050d80f6f9 100644
> --- a/target/arm/translate.h
> +++ b/target/arm/translate.h
> @@ -30,7 +30,6 @@ typedef struct DisasContext {
> bool eci_handled;
> /* TCG op to rewind to if this turns out to be an invalid ECI state */
> TCGOp *insn_eci_rewind;
> - int thumb;
> int sctlr_b;
> MemOp be_data;
> #if !defined(CONFIG_USER_ONLY)
> @@ -65,6 +64,7 @@ typedef struct DisasContext {
> GHashTable *cp_regs;
> uint64_t features; /* CPU features bits */
> bool aarch64;
> + bool thumb;
> /* Because unallocated encodings generate different exception syndrome
> * information from traps due to FP being disabled, we can't do a single
> * "is fp access disabled" check at a high level in the decode tree.
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index 4dad23db48..be7283b966 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
> @@ -14670,7 +14670,7 @@ static void
> aarch64_tr_init_disas_context(DisasContextBase *dcbase,
> */
> dc->secure_routed_to_el3 = arm_feature(env, ARM_FEATURE_EL3) &&
> !arm_el_is_aa64(env, 3);
> - dc->thumb = 0;
> + dc->thumb = false;
> dc->sctlr_b = 0;
> dc->be_data = EX_TBFLAG_ANY(tb_flags, BE_DATA) ? MO_BE : MO_LE;
> dc->condexec_mask = 0;
--
Alex Bennée
- Re: [PATCH v3 04/60] target/arm: Update SCTLR bits to ARMv9.2, (continued)
- [PATCH v3 06/60] target/arm: Change CPUArchState.aarch64 to bool, Richard Henderson, 2022/04/17
- Re:, Alex Bennée, 2022/04/19
- [PATCH v3 05/60] target/arm: Change DisasContext.aarch64 to bool, Richard Henderson, 2022/04/17
- [PATCH v3 18/60] target/arm: Use tcg_constant in translate-m-nocp.c, Richard Henderson, 2022/04/17
- [PATCH v3 08/60] target/arm: Change DisasContext.thumb to bool, Richard Henderson, 2022/04/17
- [PATCH v3 09/60] target/arm: Change CPUArchState.thumb to bool, Richard Henderson, 2022/04/17
- [PATCH v3 19/60] target/arm: Use tcg_constant in translate-neon.c, Richard Henderson, 2022/04/17
- [PATCH v3 16/60] target/arm: Simplify aa32 DISAS_WFI, Richard Henderson, 2022/04/17
- [PATCH v3 15/60] target/arm: Simplify gen_sar, Richard Henderson, 2022/04/17