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[PATCH 20/47] target/arm: Use tcg_constant in 2misc expanders
From: |
Richard Henderson |
Subject: |
[PATCH 20/47] target/arm: Use tcg_constant in 2misc expanders |
Date: |
Tue, 26 Apr 2022 09:30:16 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-a64.c | 40 ++++++++++----------------------------
1 file changed, 10 insertions(+), 30 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 36c714a5ed..35dc21da8f 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -10088,7 +10088,7 @@ static void handle_2misc_narrow(DisasContext *s, bool
scalar,
int passes = scalar ? 1 : 2;
if (scalar) {
- tcg_res[1] = tcg_const_i32(0);
+ tcg_res[1] = tcg_constant_i32(0);
}
for (pass = 0; pass < passes; pass++) {
@@ -10266,9 +10266,7 @@ static void handle_2misc_satacc(DisasContext *s, bool
is_scalar, bool is_u,
}
if (is_scalar) {
- TCGv_i64 tcg_zero = tcg_const_i64(0);
- write_vec_element(s, tcg_zero, rd, 0, MO_64);
- tcg_temp_free_i64(tcg_zero);
+ write_vec_element(s, tcg_constant_i64(0), rd, 0, MO_64);
}
write_vec_element_i32(s, tcg_rd, rd, pass, MO_32);
}
@@ -10451,23 +10449,17 @@ static void
disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn)
case 0x1c: /* FCVTAS */
case 0x3a: /* FCVTPS */
case 0x3b: /* FCVTZS */
- {
- TCGv_i32 tcg_shift = tcg_const_i32(0);
- gen_helper_vfp_tosls(tcg_rd, tcg_rn, tcg_shift, tcg_fpstatus);
- tcg_temp_free_i32(tcg_shift);
+ gen_helper_vfp_tosls(tcg_rd, tcg_rn, tcg_constant_i32(0),
+ tcg_fpstatus);
break;
- }
case 0x5a: /* FCVTNU */
case 0x5b: /* FCVTMU */
case 0x5c: /* FCVTAU */
case 0x7a: /* FCVTPU */
case 0x7b: /* FCVTZU */
- {
- TCGv_i32 tcg_shift = tcg_const_i32(0);
- gen_helper_vfp_touls(tcg_rd, tcg_rn, tcg_shift, tcg_fpstatus);
- tcg_temp_free_i32(tcg_shift);
+ gen_helper_vfp_touls(tcg_rd, tcg_rn, tcg_constant_i32(0),
+ tcg_fpstatus);
break;
- }
default:
g_assert_not_reached();
}
@@ -10639,8 +10631,7 @@ static void handle_vec_simd_shrn(DisasContext *s, bool
is_q,
read_vec_element(s, tcg_final, rd, is_q ? 1 : 0, MO_64);
if (round) {
- uint64_t round_const = 1ULL << (shift - 1);
- tcg_round = tcg_const_i64(round_const);
+ tcg_round = tcg_constant_i64(1ULL << (shift - 1));
} else {
tcg_round = NULL;
}
@@ -10658,9 +10649,6 @@ static void handle_vec_simd_shrn(DisasContext *s, bool
is_q,
} else {
write_vec_element(s, tcg_final, rd, 1, MO_64);
}
- if (round) {
- tcg_temp_free_i64(tcg_round);
- }
tcg_temp_free_i64(tcg_rn);
tcg_temp_free_i64(tcg_rd);
tcg_temp_free_i64(tcg_final);
@@ -12364,7 +12352,7 @@ static void handle_2misc_pairwise(DisasContext *s, int
opcode, bool u,
}
}
if (!is_q) {
- tcg_res[1] = tcg_const_i64(0);
+ tcg_res[1] = tcg_constant_i64(0);
}
for (pass = 0; pass < 2; pass++) {
write_vec_element(s, tcg_res[pass], rd, pass, MO_64);
@@ -12797,25 +12785,17 @@ static void disas_simd_two_reg_misc(DisasContext *s,
uint32_t insn)
case 0x1c: /* FCVTAS */
case 0x3a: /* FCVTPS */
case 0x3b: /* FCVTZS */
- {
- TCGv_i32 tcg_shift = tcg_const_i32(0);
gen_helper_vfp_tosls(tcg_res, tcg_op,
- tcg_shift, tcg_fpstatus);
- tcg_temp_free_i32(tcg_shift);
+ tcg_constant_i32(0), tcg_fpstatus);
break;
- }
case 0x5a: /* FCVTNU */
case 0x5b: /* FCVTMU */
case 0x5c: /* FCVTAU */
case 0x7a: /* FCVTPU */
case 0x7b: /* FCVTZU */
- {
- TCGv_i32 tcg_shift = tcg_const_i32(0);
gen_helper_vfp_touls(tcg_res, tcg_op,
- tcg_shift, tcg_fpstatus);
- tcg_temp_free_i32(tcg_shift);
+ tcg_constant_i32(0), tcg_fpstatus);
break;
- }
case 0x18: /* FRINTN */
case 0x19: /* FRINTM */
case 0x38: /* FRINTP */
--
2.34.1
- [PATCH 13/47] target/arm: Use tcg_constant in shift_reg_imm, (continued)
- [PATCH 13/47] target/arm: Use tcg_constant in shift_reg_imm, Richard Henderson, 2022/04/26
- [PATCH 12/47] target/arm: Use tcg_constant in disas_movw_imm, Richard Henderson, 2022/04/26
- [PATCH 37/47] target/arm: Use tcg_constant in SINCDEC, INCDEC, Richard Henderson, 2022/04/26
- [PATCH 15/47] target/arm: Use tcg_constant in handle_{rev16,crc32}, Richard Henderson, 2022/04/26
- [PATCH 10/47] target/arm: Use tcg_constant in disas_ldst_*, Richard Henderson, 2022/04/26
- [PATCH 20/47] target/arm: Use tcg_constant in 2misc expanders,
Richard Henderson <=
- [PATCH 21/47] target/arm: Use tcg_constant in balance of translate-a64.c, Richard Henderson, 2022/04/26
- [PATCH 16/47] target/arm: Use tcg_constant in disas_data_proc_2src, Richard Henderson, 2022/04/26
- [PATCH 28/47] target/arm: Use tcg_constant for op_s_{rri,rxi}_rot, Richard Henderson, 2022/04/26
- [PATCH 26/47] target/arm: Use tcg_constant for do_coproc_insn, Richard Henderson, 2022/04/26
- [PATCH 23/47] target/arm: Use tcg_constant for disas_iwmmxt_insn, Richard Henderson, 2022/04/26