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[PULL 14/15] hw/gpio: replace HWADDR_PRIx with PRIx64
From: |
Cédric Le Goater |
Subject: |
[PULL 14/15] hw/gpio: replace HWADDR_PRIx with PRIx64 |
Date: |
Wed, 25 May 2022 18:01:35 +0200 |
From: Jamin Lin <jamin_lin@aspeedtech.com>
1. replace HWADDR_PRIx with PRIx64
2. fix indent issue
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220525053444.27228-5-jamin_lin@aspeedtech.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/gpio/aspeed_gpio.h | 2 +-
hw/gpio/aspeed_gpio.c | 8 ++++----
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/hw/gpio/aspeed_gpio.h b/include/hw/gpio/aspeed_gpio.h
index 41b36524d062..904eecf62c4c 100644
--- a/include/hw/gpio/aspeed_gpio.h
+++ b/include/hw/gpio/aspeed_gpio.h
@@ -67,7 +67,7 @@ enum GPIORegIndexType {
typedef struct AspeedGPIOReg {
uint16_t set_idx;
enum GPIORegType type;
- } AspeedGPIOReg;
+} AspeedGPIOReg;
struct AspeedGPIOClass {
SysBusDevice parent_obj;
diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
index c834bf19f5ce..a62a673857c2 100644
--- a/hw/gpio/aspeed_gpio.c
+++ b/hw/gpio/aspeed_gpio.c
@@ -561,7 +561,7 @@ static uint64_t aspeed_gpio_read(void *opaque, hwaddr
offset, uint32_t size)
reg = &agc->reg_table[idx];
if (reg->set_idx >= agc->nr_gpio_sets) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: no getter for offset 0x%"
- HWADDR_PRIx"\n", __func__, offset);
+ PRIx64"\n", __func__, offset);
return 0;
}
@@ -611,7 +611,7 @@ static uint64_t aspeed_gpio_read(void *opaque, hwaddr
offset, uint32_t size)
break;
default:
qemu_log_mask(LOG_GUEST_ERROR, "%s: no getter for offset 0x%"
- HWADDR_PRIx"\n", __func__, offset);
+ PRIx64"\n", __func__, offset);
return 0;
}
@@ -787,7 +787,7 @@ static void aspeed_gpio_write(void *opaque, hwaddr offset,
uint64_t data,
reg = &agc->reg_table[idx];
if (reg->set_idx >= agc->nr_gpio_sets) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: no setter for offset 0x%"
- HWADDR_PRIx"\n", __func__, offset);
+ PRIx64"\n", __func__, offset);
return;
}
@@ -872,7 +872,7 @@ static void aspeed_gpio_write(void *opaque, hwaddr offset,
uint64_t data,
break;
default:
qemu_log_mask(LOG_GUEST_ERROR, "%s: no setter for offset 0x%"
- HWADDR_PRIx"\n", __func__, offset);
+ PRIx64"\n", __func__, offset);
return;
}
aspeed_gpio_update(s, set, set->data_value);
--
2.35.3
- [PULL 06/15] hw: aspeed: Add missing UART's, (continued)
- [PULL 06/15] hw: aspeed: Add missing UART's, Cédric Le Goater, 2022/05/25
- [PULL 07/15] hw: aspeed: Add uarts_num SoC attribute, Cédric Le Goater, 2022/05/25
- [PULL 09/15] hw: aspeed: Introduce common UART init function, Cédric Le Goater, 2022/05/25
- [PULL 01/15] docs: add minibmc section in aspeed document, Cédric Le Goater, 2022/05/25
- [PULL 04/15] hw: m25p80: allow write_enable latch get/set, Cédric Le Goater, 2022/05/25
- [PULL 08/15] hw: aspeed: Ensure AST1030 respects uart-default, Cédric Le Goater, 2022/05/25
- [PULL 12/15] hw/gpio: Add ASPEED GPIO model for AST1030, Cédric Le Goater, 2022/05/25
- [PULL 10/15] hw: aspeed: Init all UART's with serial devices, Cédric Le Goater, 2022/05/25
- [PULL 13/15] hw/gpio support GPIO index mode for write operation., Cédric Le Goater, 2022/05/25
- [PULL 11/15] hw/gpio Add GPIO read/write trace event., Cédric Le Goater, 2022/05/25
- [PULL 14/15] hw/gpio: replace HWADDR_PRIx with PRIx64,
Cédric Le Goater <=
- [PULL 15/15] hw/arm/aspeed: Add i2c devices for AST2600 EVB, Cédric Le Goater, 2022/05/25
- Re: [PULL 00/15] aspeed queue, Richard Henderson, 2022/05/25