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Re: [PATCH 41/71] target/arm: Add infrastructure for disas_sme
From: |
Peter Maydell |
Subject: |
Re: [PATCH 41/71] target/arm: Add infrastructure for disas_sme |
Date: |
Tue, 7 Jun 2022 11:03:41 +0100 |
On Thu, 2 Jun 2022 at 23:41, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> This includes the build rules for the decoder, and the
> new file for translation, but excludes any instructions.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> @@ -14814,7 +14814,12 @@ static void
> aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
> }
>
> switch (extract32(insn, 25, 4)) {
> - case 0x0: case 0x1: case 0x3: /* UNALLOCATED */
> + case 0x0:
> + if (!disas_sme(s, insn)) {
> + unallocated_encoding(s);
> + }
> + break;
> + case 0x1: case 0x3: /* UNALLOCATED */
> unallocated_encoding(s);
> break;
> case 0x2:
This is grabbing slightly more of the encoding space than it should
according to the Arm ARM Table C4-1 "Main encoding table": SME
encodings require bit 31 == 1 (unlike SVE where bit 31 is not decoded
at this level).
Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
- Re: [PATCH 26/71] target/arm: Add SMCR_ELx, (continued)
- [PATCH 38/71] target/arm: Introduce sve_vqm1_for_el_sm, Richard Henderson, 2022/06/02
- [PATCH 37/71] target/arm: Add cpu properties for SME, Richard Henderson, 2022/06/02
- [PATCH 40/71] target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h, Richard Henderson, 2022/06/02
- [PATCH 42/71] target/arm: Trap AdvSIMD usage when Streaming SVE is active, Richard Henderson, 2022/06/02
- [PATCH 41/71] target/arm: Add infrastructure for disas_sme, Richard Henderson, 2022/06/02
- Re: [PATCH 41/71] target/arm: Add infrastructure for disas_sme,
Peter Maydell <=
- [PATCH 43/71] target/arm: Implement SME RDSVL, ADDSVL, ADDSPL, Richard Henderson, 2022/06/02
- [PATCH 45/71] target/arm: Implement SME MOVA, Richard Henderson, 2022/06/02
- [PATCH 44/71] target/arm: Implement SME ZERO, Richard Henderson, 2022/06/02
- [PATCH 48/71] target/arm: Implement SME LDR, STR, Richard Henderson, 2022/06/02
- [PATCH 46/71] target/arm: Implement SME LD1, ST1, Richard Henderson, 2022/06/02
- [PATCH 49/71] target/arm: Implement SME ADDHA, ADDVA, Richard Henderson, 2022/06/02
- [PATCH 54/71] target/arm: Implement PSEL, Richard Henderson, 2022/06/02
- [PATCH 58/71] target/arm: Enable SME for -cpu max, Richard Henderson, 2022/06/02
- [PATCH 51/71] target/arm: Implement BFMOPA, BFMOPS, Richard Henderson, 2022/06/02