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[PATCH v2 29/71] target/arm: Add the SME ZA storage to CPUARMState
From: |
Richard Henderson |
Subject: |
[PATCH v2 29/71] target/arm: Add the SME ZA storage to CPUARMState |
Date: |
Tue, 7 Jun 2022 13:32:24 -0700 |
Place this late in the resettable section of the structure,
to keep the most common element offsets from being > 64k.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 8 ++++++++
target/arm/machine.c | 34 ++++++++++++++++++++++++++++++++++
2 files changed, 42 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index b48a80dab7..ef374eefe8 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -694,6 +694,14 @@ typedef struct CPUArchState {
} keys;
uint64_t scxtnum_el[4];
+
+ /*
+ * SME ZA storage -- 256 x 256 byte array, with bytes in host word order,
+ * as we do with vfp.zregs[]. Because this is so large, keep this toward
+ * the end of the reset area, to keep the offsets into the rest of the
+ * structure smaller.
+ */
+ ARMVectorReg zarray[ARM_MAX_VQ * 16];
#endif
#if defined(CONFIG_USER_ONLY)
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 285e387d2c..54c5c62433 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -167,6 +167,39 @@ static const VMStateDescription vmstate_sve = {
VMSTATE_END_OF_LIST()
}
};
+
+static const VMStateDescription vmstate_vreg = {
+ .name = "vreg",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT64_ARRAY(d, ARMVectorReg, ARM_MAX_VQ * 2),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static bool za_needed(void *opaque)
+{
+ ARMCPU *cpu = opaque;
+
+ /*
+ * When ZA storage is disabled, its contents are discarded.
+ * It will be zeroed when ZA storage is re-enabled.
+ */
+ return FIELD_EX64(cpu->env.svcr, SVCR, ZA);
+}
+
+static const VMStateDescription vmstate_za = {
+ .name = "cpu/sme",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = za_needed,
+ .fields = (VMStateField[]) {
+ VMSTATE_STRUCT_ARRAY(env.zarray, ARMCPU, ARM_MAX_VQ * 16, 0,
+ vmstate_vreg, ARMVectorReg),
+ VMSTATE_END_OF_LIST()
+ }
+};
#endif /* AARCH64 */
static bool serror_needed(void *opaque)
@@ -884,6 +917,7 @@ const VMStateDescription vmstate_arm_cpu = {
&vmstate_m_security,
#ifdef TARGET_AARCH64
&vmstate_sve,
+ &vmstate_za,
#endif
&vmstate_serror,
&vmstate_irq_line_state,
--
2.34.1
- [PATCH v2 16/71] target/arm: Use expand_pred_b in mve_helper.c, (continued)
- [PATCH v2 16/71] target/arm: Use expand_pred_b in mve_helper.c, Richard Henderson, 2022/06/07
- [PATCH v2 21/71] target/arm: Implement TPIDR2_EL0, Richard Henderson, 2022/06/07
- [PATCH v2 22/71] target/arm: Add SMEEXC_EL to TB flags, Richard Henderson, 2022/06/07
- [PATCH v2 23/71] target/arm: Add syn_smetrap, Richard Henderson, 2022/06/07
- [PATCH v2 24/71] target/arm: Add ARM_CP_SME, Richard Henderson, 2022/06/07
- [PATCH v2 25/71] target/arm: Add SVCR, Richard Henderson, 2022/06/07
- [PATCH v2 27/71] target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2, Richard Henderson, 2022/06/07
- [PATCH v2 28/71] target/arm: Add PSTATE.{SM,ZA} to TB flags, Richard Henderson, 2022/06/07
- [PATCH v2 29/71] target/arm: Add the SME ZA storage to CPUARMState,
Richard Henderson <=
- [PATCH v2 20/71] target/arm: Add ID_AA64SMFR0_EL1, Richard Henderson, 2022/06/07
- [PATCH v2 33/71] target/arm: Generalize cpu_arm_{get,set}_vq, Richard Henderson, 2022/06/07
- [PATCH v2 31/71] target/arm: Move error for sve%d property to arm_cpu_sve_finalize, Richard Henderson, 2022/06/07
- [PATCH v2 30/71] target/arm: Implement SMSTART, SMSTOP, Richard Henderson, 2022/06/07
- [PATCH v2 34/71] target/arm: Generalize cpu_arm_{get, set}_default_vec_len, Richard Henderson, 2022/06/07
- [PATCH v2 35/71] target/arm: Move arm_cpu_*_finalize to internals.h, Richard Henderson, 2022/06/07