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[PATCH v2 2/2] hw: m25p80: add tests for write protect
From: |
Iris Chen |
Subject: |
[PATCH v2 2/2] hw: m25p80: add tests for write protect |
Date: |
Wed, 8 Jun 2022 20:13:20 -0700 |
Signed-off-by: Iris Chen <irischenlj@fb.com>
---
Include the tests in a separate patch. Using qtest_set_irq_in() as per review.
tests/qtest/aspeed_smc-test.c | 60 +++++++++++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/tests/qtest/aspeed_smc-test.c b/tests/qtest/aspeed_smc-test.c
index c5d97d4410..7786addfb8 100644
--- a/tests/qtest/aspeed_smc-test.c
+++ b/tests/qtest/aspeed_smc-test.c
@@ -392,6 +392,64 @@ static void test_read_status_reg(void)
flash_reset();
}
+static void test_status_reg_write_protection(void)
+{
+ uint8_t r;
+
+ spi_conf(CONF_ENABLE_W0);
+
+ /* default case: WP# is high and SRWD is low -> status register writable */
+ spi_ctrl_start_user();
+ writeb(ASPEED_FLASH_BASE, WREN);
+ /* test ability to write SRWD */
+ writeb(ASPEED_FLASH_BASE, WRSR);
+ writeb(ASPEED_FLASH_BASE, SRWD);
+ writeb(ASPEED_FLASH_BASE, RDSR);
+ r = readb(ASPEED_FLASH_BASE);
+ spi_ctrl_stop_user();
+ g_assert_cmphex(r & SRWD, ==, SRWD);
+
+ /* WP# high and SRWD high -> status register writable */
+ spi_ctrl_start_user();
+ writeb(ASPEED_FLASH_BASE, WREN);
+ /* test ability to write SRWD */
+ writeb(ASPEED_FLASH_BASE, WRSR);
+ writeb(ASPEED_FLASH_BASE, 0);
+ writeb(ASPEED_FLASH_BASE, RDSR);
+ r = readb(ASPEED_FLASH_BASE);
+ spi_ctrl_stop_user();
+ g_assert_cmphex(r & SRWD, ==, 0);
+
+ /* WP# low and SRWD low -> status register writable */
+ qtest_set_irq_in(global_qtest,
+ "/machine/soc/fmc/ssi.0/child[0]", "WP#", 0, 0);
+ spi_ctrl_start_user();
+ writeb(ASPEED_FLASH_BASE, WREN);
+ /* test ability to write SRWD */
+ writeb(ASPEED_FLASH_BASE, WRSR);
+ writeb(ASPEED_FLASH_BASE, SRWD);
+ writeb(ASPEED_FLASH_BASE, RDSR);
+ r = readb(ASPEED_FLASH_BASE);
+ spi_ctrl_stop_user();
+ g_assert_cmphex(r & SRWD, ==, SRWD);
+
+ /* WP# low and SRWD high -> status register NOT writable */
+ spi_ctrl_start_user();
+ writeb(ASPEED_FLASH_BASE, WREN);
+ /* test ability to write SRWD */
+ writeb(ASPEED_FLASH_BASE, WRSR);
+ writeb(ASPEED_FLASH_BASE, 0);
+ writeb(ASPEED_FLASH_BASE, RDSR);
+ r = readb(ASPEED_FLASH_BASE);
+ spi_ctrl_stop_user();
+ /* write is not successful */
+ g_assert_cmphex(r & SRWD, ==, SRWD);
+
+ qtest_set_irq_in(global_qtest,
+ "/machine/soc/fmc/ssi.0/child[0]", "WP#", 0, 1);
+ flash_reset();
+}
+
static char tmp_path[] = "/tmp/qtest.m25p80.XXXXXX";
int main(int argc, char **argv)
@@ -418,6 +476,8 @@ int main(int argc, char **argv)
qtest_add_func("/ast2400/smc/read_page_mem", test_read_page_mem);
qtest_add_func("/ast2400/smc/write_page_mem", test_write_page_mem);
qtest_add_func("/ast2400/smc/read_status_reg", test_read_status_reg);
+ qtest_add_func("/ast2400/smc/status_reg_write_protection",
+ test_status_reg_write_protection);
ret = g_test_run();
--
2.30.2
- [PATCH v2 1/2] hw: m25p80: add WP# pin and SRWD bit for write protection, Iris Chen, 2022/06/08
- [PATCH v2 2/2] hw: m25p80: add tests for write protect,
Iris Chen <=
- Re: [PATCH v2 1/2] hw: m25p80: add WP# pin and SRWD bit for write protection, Cédric Le Goater, 2022/06/09
- Re: [PATCH v2 1/2] hw: m25p80: add WP# pin and SRWD bit for write protection, Francisco Iglesias, 2022/06/09
- Re: [PATCH v2 1/2] hw: m25p80: add WP# pin and SRWD bit for write protection, Peter Delevoryas, 2022/06/09
- Re: [PATCH v2 1/2] hw: m25p80: add WP# pin and SRWD bit for write protection, Dan Zhang, 2022/06/14
- Re: [PATCH v2 1/2] hw: m25p80: add WP# pin and SRWD bit for write protection, Dan Zhang, 2022/06/14
- Re: [PATCH v2 1/2] hw: m25p80: add WP# pin and SRWD bit for write protection, Cédric Le Goater, 2022/06/14
- [PATCH] hw:w25p80: Add STATE_STANDBY to handle incorrect command, Dan Zhang, 2022/06/14
- Re: [PATCH] hw:w25p80: Add STATE_STANDBY to handle incorrect command, Dan Zhang, 2022/06/14