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[PATCH v2 1/7] hw/arm/aspeed: add support for the Qualcomm DC-SCM v1 boa
From: |
Jae Hyun Yoo |
Subject: |
[PATCH v2 1/7] hw/arm/aspeed: add support for the Qualcomm DC-SCM v1 board |
Date: |
Mon, 27 Jun 2022 08:46:57 -0700 |
Add qcom-dc-scm-v1 board support.
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
---
Changes in v2:
* Fixed a typo in HW strap value comment. (Rebecca)
* Removed a useless change which is reverted by the next patch. (Joel)
hw/arm/aspeed.c | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 98dc185acd9a..cb7d99513816 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -174,6 +174,10 @@ struct AspeedMachineState {
#define BLETCHLEY_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1
#define BLETCHLEY_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2
+/* Qualcomm DC-SCM hardware value */
+#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000
+#define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041
+
/*
* The max ram region is for firmwares that scan the address space
* with load/store to guess how much RAM the SoC has.
@@ -988,6 +992,13 @@ static void fby35_i2c_init(AspeedMachineState *bmc)
*/
}
+static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = &bmc->soc;
+
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
+}
+
static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
{
return ASPEED_MACHINE(obj)->mmio_exec;
@@ -1420,6 +1431,26 @@ static void
aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
amc->macs_mask = 0;
}
+static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
+ void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)";
+ amc->soc_name = "ast2600-a3";
+ amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
+ amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
+ amc->fmc_model = "n25q512a";
+ amc->spi_model = "n25q512a";
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
+ amc->i2c_init = qcom_dc_scm_bmc_i2c_init;
+ mc->default_ram_size = 1 * GiB;
+ mc->default_cpus = mc->min_cpus = mc->max_cpus =
+ aspeed_soc_num_cpus(amc->soc_name);
+};
+
static const TypeInfo aspeed_machine_types[] = {
{
.name = MACHINE_TYPE_NAME("palmetto-bmc"),
@@ -1457,6 +1488,10 @@ static const TypeInfo aspeed_machine_types[] = {
.name = MACHINE_TYPE_NAME("g220a-bmc"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_g220a_class_init,
+ }, {
+ .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
}, {
.name = MACHINE_TYPE_NAME("fp5280g2-bmc"),
.parent = TYPE_ASPEED_MACHINE,
--
2.25.1
- [PATCH v2 3/7] hw/i2c: pmbus: Page #255 is valid page for read requests., (continued)
- [PATCH v2 3/7] hw/i2c: pmbus: Page #255 is valid page for read requests., Jae Hyun Yoo, 2022/06/27
- [PATCH v2 5/7] hw/arm/aspeed: Add MAX31785 Fan controllers, Jae Hyun Yoo, 2022/06/27
- [PATCH v2 4/7] hw/sensor: add Maxim MAX31785 device, Jae Hyun Yoo, 2022/06/27
- [PATCH v2 6/7] hw/arm/aspeed: firework: Add Thermal Diodes, Jae Hyun Yoo, 2022/06/27
- [PATCH v2 7/7] hw/arm/aspeed: firework: add I2C MUXes for VR channels, Jae Hyun Yoo, 2022/06/27
- [PATCH v2 1/7] hw/arm/aspeed: add support for the Qualcomm DC-SCM v1 board,
Jae Hyun Yoo <=
- Re: [PATCH v2 0/7] Add Qualcomm BMC machines, Cédric Le Goater, 2022/06/27