qemu-arm
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v2 2/7] hw/arm/aspeed: add Qualcomm Firework BMC machine


From: Cédric Le Goater
Subject: Re: [PATCH v2 2/7] hw/arm/aspeed: add Qualcomm Firework BMC machine
Date: Mon, 27 Jun 2022 18:00:25 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0

On 6/27/22 17:46, Jae Hyun Yoo wrote:
From: Graeme Gregory <quic_ggregory@quicinc.com>

Add base for Qualcomm Firework BMC machine.

Signed-off-by: Graeme Gregory <quic_ggregory@quicinc.com>
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
---
Changes in v2:
* Changed machine name to 'qcom-firework-bmc'. (Cedric)
* Dropped FRU eeprom initialization part. (Patrick)


Let's see what happens next. If we don't have a good solution before 7.1,
it is better to reintroduce the helper qcom_dc_scm_fru_init() with a
more generic name.

Reviewed-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.



  hw/arm/aspeed.c | 34 ++++++++++++++++++++++++++++++++++
  1 file changed, 34 insertions(+)

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index cb7d99513816..342cf39c9747 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -999,6 +999,16 @@ static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState 
*bmc)
      i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 
0x4d);
  }
+static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc)
+{
+    AspeedSoCState *soc = &bmc->soc;
+
+    /* Create the generic DC-SCM hardware */
+    qcom_dc_scm_bmc_i2c_init(bmc);
+
+    /* Now create the Firework specific hardware */
+}
+
  static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
  {
      return ASPEED_MACHINE(obj)->mmio_exec;
@@ -1451,6 +1461,26 @@ static void 
aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
          aspeed_soc_num_cpus(amc->soc_name);
  };
+static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc,
+                                                    void *data)
+{
+    MachineClass *mc = MACHINE_CLASS(oc);
+    AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+    mc->desc       = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)";
+    amc->soc_name  = "ast2600-a3";
+    amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
+    amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
+    amc->fmc_model = "n25q512a";
+    amc->spi_model = "n25q512a";
+    amc->num_cs    = 2;
+    amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
+    amc->i2c_init  = qcom_dc_scm_firework_i2c_init;
+    mc->default_ram_size = 1 * GiB;
+    mc->default_cpus = mc->min_cpus = mc->max_cpus =
+        aspeed_soc_num_cpus(amc->soc_name);
+};
+
  static const TypeInfo aspeed_machine_types[] = {
      {
          .name          = MACHINE_TYPE_NAME("palmetto-bmc"),
@@ -1492,6 +1522,10 @@ static const TypeInfo aspeed_machine_types[] = {
          .name          = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
          .parent        = TYPE_ASPEED_MACHINE,
          .class_init    = aspeed_machine_qcom_dc_scm_v1_class_init,
+    }, {
+        .name          = MACHINE_TYPE_NAME("qcom-firework-bmc"),
+        .parent        = TYPE_ASPEED_MACHINE,
+        .class_init    = aspeed_machine_qcom_firework_class_init,
      }, {
          .name          = MACHINE_TYPE_NAME("fp5280g2-bmc"),
          .parent        = TYPE_ASPEED_MACHINE,




reply via email to

[Prev in Thread] Current Thread [Next in Thread]