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Re: [PATCH 00/14] aspeed: Add I2C new register DMA slave mode support


From: Cédric Le Goater
Subject: Re: [PATCH 00/14] aspeed: Add I2C new register DMA slave mode support
Date: Tue, 28 Jun 2022 09:05:11 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0

On 6/27/22 21:54, Peter Delevoryas wrote:
Hey everyone,

I'm sending a big patch series for this, but only the last commit is really
intended to be accepted right now. I'm just including the rest of them
because it depends on them for testing.

Klaus's changes include the multi-master stuff in hw/i2c/core.c, and the old
register mode slave mode support.

My series of patches includes a bunch of changes to eliminate most (if not
all) of the I2C errors reported by the fb OpenBIC firmware for fby35
CraterLake Bridge Interconnect (BIC) (shortname: oby35-cl) upon startup.

In particular, I needed to add the IC_DEVICE_ID to the isl voltage regulator
implementation, which required a fix to the pmbus implementation when
switching pages. We weren't resetting the buffer state when switching
pages there.

I also added a placeholder implementation of the PECI controller, that does
almost nothing, but doesn't produce errors.

I added the fby35-cpld, which oby35-cl queries using master-mode TX and RX
commands.

And finally, I added an "intel-me" device (Intel Management Engine) that
attempts to respond to the first IPMB message sent by the BIC. I used this
to test the final patch, which I actually want to merge, the I2C new
register DMA slave mode support.

All the patches except the last one can be ignored for now if you want,
again, I just included them for testing purposes.

The final patch is pretty rough, but I wanted to start the review instead of
waiting too long. I expect the interrupt handling part will be
the main blocker.

Thanks,
Peter

Klaus Jensen (3):
   hw/i2c: support multiple masters
   hw/i2c: add asynchronous send
   hw/i2c/aspeed: add slave device in old register mode

Peter Delevoryas (11):
   aspeed: i2c: Fix DMA len write-enable bit handling
   aspeed: i2c: Fix R_I2CD_FUN_CTRL reference
   aspeed: i2c: Fix MASTER_EN missing error message


I  didn't receive this patch ?

C.


   aspeed: Add PECI controller
   hw/misc: Add fby35-cpld
   pmbus: Reset out buf after switching pages
   pmbus: Add read-only IC_DEVICE_ID support
   aspeed: Add oby35-cl machine
   hw/misc: Add intel-me
   aspeed: Add intel-me on i2c6 instead of BMC
   aspeed: Add I2C new register DMA slave mode support

  hw/arm/aspeed.c                  |  42 ++++++
  hw/arm/aspeed_ast10x0.c          |  11 ++
  hw/arm/pxa2xx.c                  |   2 +
  hw/display/sii9022.c             |   2 +
  hw/display/ssd0303.c             |   2 +
  hw/i2c/aspeed_i2c.c              | 234 +++++++++++++++++++++++++++----
  hw/i2c/core.c                    |  70 ++++++++-
  hw/i2c/pmbus_device.c            |   6 +
  hw/i2c/smbus_slave.c             |   4 +
  hw/i2c/trace-events              |   2 +
  hw/misc/aspeed_peci.c            | 225 +++++++++++++++++++++++++++++
  hw/misc/fby35_cpld.c             | 137 ++++++++++++++++++
  hw/misc/intel_me.c               | 176 +++++++++++++++++++++++
  hw/misc/meson.build              |   5 +-
  hw/nvram/eeprom_at24c.c          |   2 +
  hw/sensor/isl_pmbus_vr.c         |  30 ++++
  hw/sensor/lsm303dlhc_mag.c       |   2 +
  include/hw/arm/aspeed_soc.h      |   3 +
  include/hw/i2c/aspeed_i2c.h      |  11 ++
  include/hw/i2c/i2c.h             |  30 ++++
  include/hw/i2c/pmbus_device.h    |   1 +
  include/hw/misc/aspeed_peci.h    |  34 +++++
  include/hw/sensor/isl_pmbus_vr.h |   1 +
  23 files changed, 1002 insertions(+), 30 deletions(-)
  create mode 100644 hw/misc/aspeed_peci.c
  create mode 100644 hw/misc/fby35_cpld.c
  create mode 100644 hw/misc/intel_me.c
  create mode 100644 include/hw/misc/aspeed_peci.h





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