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Re: [PATCH 2/9] hw/arm/aspeed: Use the IEC binary prefix definitions
From: |
Peter Delevoryas |
Subject: |
Re: [PATCH 2/9] hw/arm/aspeed: Use the IEC binary prefix definitions |
Date: |
Thu, 29 Dec 2022 12:42:50 -0800 |
On Thu, Dec 29, 2022 at 04:23:18PM +0100, Philippe Mathieu-Daudé wrote:
> IEC binary prefixes ease code review: the unit is explicit.
Oh, yeah, another good idea.
Reviewed-by: Peter Delevoryas <peter@pjd.dev>
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/arm/aspeed_ast10x0.c | 3 ++-
> hw/arm/aspeed_ast2600.c | 3 ++-
> hw/arm/aspeed_soc.c | 4 ++--
> 3 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c
> index 122b3fd3f3..3500294df7 100644
> --- a/hw/arm/aspeed_ast10x0.c
> +++ b/hw/arm/aspeed_ast10x0.c
> @@ -10,6 +10,7 @@
> */
>
> #include "qemu/osdep.h"
> +#include "qemu/units.h"
> #include "qapi/error.h"
> #include "exec/address-spaces.h"
> #include "sysemu/sysemu.h"
> @@ -348,7 +349,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass
> *klass, void *data)
> sc->name = "ast1030-a1";
> sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4");
> sc->silicon_rev = AST1030_A1_SILICON_REV;
> - sc->sram_size = 0xc0000;
> + sc->sram_size = 768 * KiB;
> sc->spis_num = 2;
> sc->ehcis_num = 0;
> sc->wdts_num = 4;
> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
> index a79e05ddbd..72df72a540 100644
> --- a/hw/arm/aspeed_ast2600.c
> +++ b/hw/arm/aspeed_ast2600.c
> @@ -8,6 +8,7 @@
> */
>
> #include "qemu/osdep.h"
> +#include "qemu/units.h"
> #include "qapi/error.h"
> #include "hw/misc/unimp.h"
> #include "hw/arm/aspeed_soc.h"
> @@ -619,7 +620,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass
> *oc, void *data)
> sc->name = "ast2600-a3";
> sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
> sc->silicon_rev = AST2600_A3_SILICON_REV;
> - sc->sram_size = 0x16400;
> + sc->sram_size = 89 * KiB;
> sc->spis_num = 2;
> sc->ehcis_num = 2;
> sc->wdts_num = 4;
> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
> index 2c0924d311..677342c9ed 100644
> --- a/hw/arm/aspeed_soc.c
> +++ b/hw/arm/aspeed_soc.c
> @@ -517,7 +517,7 @@ static void aspeed_soc_ast2400_class_init(ObjectClass
> *oc, void *data)
> sc->name = "ast2400-a1";
> sc->cpu_type = ARM_CPU_TYPE_NAME("arm926");
> sc->silicon_rev = AST2400_A1_SILICON_REV;
> - sc->sram_size = 0x8000;
> + sc->sram_size = 32 * KiB;
> sc->spis_num = 1;
> sc->ehcis_num = 1;
> sc->wdts_num = 2;
> @@ -544,7 +544,7 @@ static void aspeed_soc_ast2500_class_init(ObjectClass
> *oc, void *data)
> sc->name = "ast2500-a1";
> sc->cpu_type = ARM_CPU_TYPE_NAME("arm1176");
> sc->silicon_rev = AST2500_A1_SILICON_REV;
> - sc->sram_size = 0x9000;
> + sc->sram_size = 36 * KiB;
> sc->spis_num = 2;
> sc->ehcis_num = 2;
> sc->wdts_num = 3;
> --
> 2.38.1
>
- [PATCH 0/9] hw/arm/aspeed_ast10x0: Map more peripherals & few more fixes, Philippe Mathieu-Daudé, 2022/12/29
- [PATCH 1/9] hw/watchdog/wdt_aspeed: Map the whole MMIO range, Philippe Mathieu-Daudé, 2022/12/29
- [PATCH 2/9] hw/arm/aspeed: Use the IEC binary prefix definitions, Philippe Mathieu-Daudé, 2022/12/29
- Re: [PATCH 2/9] hw/arm/aspeed: Use the IEC binary prefix definitions,
Peter Delevoryas <=
- [PATCH 3/9] hw/arm/aspeed_ast10x0: Add various unimplemented peripherals, Philippe Mathieu-Daudé, 2022/12/29
- [PATCH 4/9] hw/arm/aspeed_ast10x0: Map I3C peripheral, Philippe Mathieu-Daudé, 2022/12/29
- [PATCH 5/9] hw/arm/aspeed_ast10x0: Map the secure SRAM, Philippe Mathieu-Daudé, 2022/12/29
- [PATCH 6/9] hw/arm/aspeed_ast10x0: Map HACE peripheral, Philippe Mathieu-Daudé, 2022/12/29