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[PATCH v4 22/33] target/microblaze: Implement microblaze_cpu_list()
From: |
Gavin Shan |
Subject: |
[PATCH v4 22/33] target/microblaze: Implement microblaze_cpu_list() |
Date: |
Thu, 2 Nov 2023 10:24:49 +1000 |
Implement microblaze_cpu_list() to support cpu_list(). With this applied,
the available CPU model names, same to the CPU type names, are shown
as below.
$ ./build/qemu-system-hppa -cpu ?
Available CPUs:
microblaze-cpu
Signed-off-by: Gavin Shan <gshan@redhat.com>
---
target/microblaze/cpu.c | 20 ++++++++++++++++++++
target/microblaze/cpu.h | 3 +++
2 files changed, 23 insertions(+)
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index bbb3335cad..7d05dd954c 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "qapi/error.h"
+#include "qemu/qemu-print.h"
#include "cpu.h"
#include "qemu/module.h"
#include "hw/qdev-properties.h"
@@ -291,6 +292,25 @@ static void mb_cpu_realizefn(DeviceState *dev, Error
**errp)
mcc->parent_realize(dev, errp);
}
+static void microblaze_cpu_list_entry(gpointer data, gpointer user_data)
+{
+ const char *typename = object_class_get_name(OBJECT_CLASS(data));
+ char *model = cpu_model_from_type(typename);
+
+ qemu_printf(" %s\n", model);
+ g_free(model);
+}
+
+void microblaze_cpu_list(void)
+{
+ GSList *list;
+
+ list = object_class_get_list_sorted(TYPE_MICROBLAZE_CPU, false);
+ qemu_printf("Available CPUs:\n");
+ g_slist_foreach(list, microblaze_cpu_list_entry, NULL);
+ g_slist_free(list);
+}
+
static void mb_cpu_initfn(Object *obj)
{
MicroBlazeCPU *cpu = MICROBLAZE_CPU(obj);
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index e43c49d4af..d5ad25a866 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -372,6 +372,9 @@ int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray
*buf, int reg);
int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, int reg);
int mb_cpu_gdb_write_stack_protect(CPUArchState *cpu, uint8_t *buf, int reg);
+void microblaze_cpu_list(void);
+
+#define cpu_list microblaze_cpu_list
static inline uint32_t mb_cpu_read_msr(const CPUMBState *env)
{
--
2.41.0
- [PATCH v4 12/33] target/m68k: Use generic helper to show CPU model names, (continued)
- [PATCH v4 12/33] target/m68k: Use generic helper to show CPU model names, Gavin Shan, 2023/11/01
- [PATCH v4 13/33] target/mips: Use generic helper to show CPU model names, Gavin Shan, 2023/11/01
- [PATCH v4 14/33] target/openrisc: Use generic helper to show CPU model names, Gavin Shan, 2023/11/01
- [PATCH v4 15/33] target/ppc: Use generic helper to show CPU model names, Gavin Shan, 2023/11/01
- [PATCH v4 16/33] target/riscv: Use generic helper to show CPU model names, Gavin Shan, 2023/11/01
- [PATCH v4 17/33] target/rx: Use generic helper to show CPU model names, Gavin Shan, 2023/11/01
- [PATCH v4 18/33] target/s390x: Use generic helper to show CPU model names, Gavin Shan, 2023/11/01
- [PATCH v4 19/33] target/sh4: Use generic helper to show CPU model names, Gavin Shan, 2023/11/01
- [PATCH v4 20/33] target/tricore: Use generic helper to show CPU model names, Gavin Shan, 2023/11/01
- [PATCH v4 21/33] target/hppa: Implement hppa_cpu_list(), Gavin Shan, 2023/11/01
- [PATCH v4 22/33] target/microblaze: Implement microblaze_cpu_list(),
Gavin Shan <=
- [PATCH v4 23/33] target/nios2: Implement nios2_cpu_list(), Gavin Shan, 2023/11/01
- [PATCH v4 24/33] cpu: Mark cpu_list() supported on all targets, Gavin Shan, 2023/11/01
- [PATCH v4 25/33] machine: Constify MachineClass::valid_cpu_types[i], Gavin Shan, 2023/11/01
- [PATCH v4 26/33] machine: Use error handling when CPU type is checked, Gavin Shan, 2023/11/01
- [PATCH v4 27/33] machine: Introduce helper is_cpu_type_supported(), Gavin Shan, 2023/11/01
- [PATCH v4 28/33] machine: Print CPU model name instead of CPU type name, Gavin Shan, 2023/11/01
- [PATCH v4 29/33] hw/arm/virt: Check CPU type in machine_run_board_init(), Gavin Shan, 2023/11/01
- [PATCH v4 30/33] hw/arm/virt: Hide host CPU model for tcg, Gavin Shan, 2023/11/01